From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
"Rafael J. Wysocki" <rafael@kernel.org>,
Sudeep Holla <sudeep.holla@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Jeremy Linton <jeremy.linton@arm.com>,
Will Deacon <will.deacon@arm.com>
Subject: Re: [PATCH v3 1/2] drivers: base: cacheinfo: Add variable to record max cache line size
Date: Mon, 27 May 2019 08:06:56 +0200 [thread overview]
Message-ID: <20190527060656.GA7997@kroah.com> (raw)
In-Reply-To: <1558922768-29155-1-git-send-email-zhangshaokun@hisilicon.com>
On Mon, May 27, 2019 at 10:06:07AM +0800, Shaokun Zhang wrote:
> Add coherency_max_size variable to record the maximum cache line size
> for different cache levels. We will synchronize it with CTR_EL0.CWG
> reporting in cache_line_size() for arm64.
>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: "Rafael J. Wysocki" <rafael@kernel.org>
> Cc: Sudeep Holla <sudeep.holla@arm.com>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Jeremy Linton <jeremy.linton@arm.com>
> Cc: Will Deacon <will.deacon@arm.com>
> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
> ---
> ChangeLog since v2:
> -- Rebase to 5.2-rc2
> -- Export cache_line_size for I/O driver
> ChangeLog since v1:
> -- Move coherency_max_size to drivers/base/cacheinfo.c
> -- Address Catalin's comments
> Link: https://www.spinics.net/lists/arm-kernel/msg723615.html
>
> drivers/base/cacheinfo.c | 5 +++++
> include/linux/cacheinfo.h | 2 ++
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> index a7359535caf5..8827c60f51e2 100644
> --- a/drivers/base/cacheinfo.c
> +++ b/drivers/base/cacheinfo.c
> @@ -213,6 +213,8 @@ int __weak cache_setup_acpi(unsigned int cpu)
> return -ENOTSUPP;
> }
>
> +unsigned int coherency_max_size;
Why are you creating a global variable?
Where are the other patches in this series?
thanks,
greg k-h
prev parent reply other threads:[~2019-05-27 6:07 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-27 2:06 [PATCH v3 1/2] drivers: base: cacheinfo: Add variable to record max cache line size Shaokun Zhang
2019-05-27 2:06 ` [PATCH v3 2/2] arm64: cacheinfo: Update cache_line_size detected from DT or PPTT Shaokun Zhang
2019-05-27 6:08 ` Greg KH
2019-05-27 7:14 ` Zhangshaokun
2019-05-27 6:06 ` Greg Kroah-Hartman [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190527060656.GA7997@kroah.com \
--to=gregkh@linuxfoundation.org \
--cc=catalin.marinas@arm.com \
--cc=jeremy.linton@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=rafael@kernel.org \
--cc=sudeep.holla@arm.com \
--cc=will.deacon@arm.com \
--cc=zhangshaokun@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).