From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: unlisted-recipients:; (no To-header on input)
Cc: Andy Gross <agross@kernel.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v9 3/4] arm64: dts: qcom: Add AOSS QMP node
Date: Tue, 11 Jun 2019 21:45:35 -0700 [thread overview]
Message-ID: <20190612044536.13940-4-bjorn.andersson@linaro.org> (raw)
In-Reply-To: <20190612044536.13940-1-bjorn.andersson@linaro.org>
The AOSS QMP provides a number of power domains, used for QDSS and
PIL, add the node for this.
Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes since v8:
- None
arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index c5a5c5b086b1..c80881309f79 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2448,6 +2448,16 @@
#reset-cells = <1>;
};
+ aoss_qmp: qmp@c300000 {
+ compatible = "qcom,sdm845-aoss-qmp";
+ reg = <0 0x0c300000 0 0x100000>;
+ interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&apss_shared 0>;
+
+ #clock-cells = <0>;
+ #power-domain-cells = <1>;
+ };
+
spmi_bus: spmi@c440000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0 0x0c440000 0 0x1100>,
--
2.18.0
next prev parent reply other threads:[~2019-06-12 4:45 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-12 4:45 [PATCH v9 0/4] Qualcomm AOSS QMP driver Bjorn Andersson
2019-06-12 4:45 ` [PATCH v9 1/4] dt-bindings: soc: qcom: Add AOSS QMP binding Bjorn Andersson
2019-06-12 4:45 ` [PATCH v9 2/4] soc: qcom: Add AOSS QMP driver Bjorn Andersson
2019-06-12 9:28 ` Sibi Sankar
2019-06-12 4:45 ` Bjorn Andersson [this message]
2019-06-12 4:45 ` [PATCH v9 4/4] arm64: dts: qcom: sdm845: Add Q6V5 MSS node Bjorn Andersson
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