From: Jiri Olsa <jolsa@kernel.org>
To: Peter Zijlstra <a.p.zijlstra@chello.nl>,
"Liang, Kan" <kan.liang@linux.intel.com>,
Stephane Eranian <eranian@google.com>,
Andy Lutomirski <luto@kernel.org>
Cc: lkml <linux-kernel@vger.kernel.org>,
Ingo Molnar <mingo@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>,
Vince Weaver <vincent.weaver@maine.edu>,
Thomas Gleixner <tglx@linutronix.de>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Subject: [PATCH 6/8] perf/x86/rapl: Get msr values from new probe framework
Date: Sun, 16 Jun 2019 16:03:56 +0200 [thread overview]
Message-ID: <20190616140358.27799-7-jolsa@kernel.org> (raw)
In-Reply-To: <20190616140358.27799-1-jolsa@kernel.org>
There's no need to have special code for getting
the bit and msr value for given event. We can
now easily get it from rapl_msrs array.
Also getting rid of RAPL_IDX_*, which is no longer
needed and replacing INTEL_RAPL* with PERF_RAPL*
enums.
Signed-off-by: Jiri Olsa <jolsa@kernel.org>
---
arch/x86/events/intel/rapl.c | 53 ++++++++----------------------------
1 file changed, 11 insertions(+), 42 deletions(-)
diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c
index 417de3fdde61..709a749a4ada 100644
--- a/arch/x86/events/intel/rapl.c
+++ b/arch/x86/events/intel/rapl.c
@@ -55,6 +55,7 @@
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/perf_event.h>
+#include <linux/nospec.h>
#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include "../perf_event.h"
@@ -65,19 +66,6 @@ MODULE_LICENSE("GPL");
/*
* RAPL energy status counters
*/
-#define RAPL_IDX_PP0_NRG_STAT 0 /* all cores */
-#define INTEL_RAPL_PP0 0x1 /* pseudo-encoding */
-#define RAPL_IDX_PKG_NRG_STAT 1 /* entire package */
-#define INTEL_RAPL_PKG 0x2 /* pseudo-encoding */
-#define RAPL_IDX_RAM_NRG_STAT 2 /* DRAM */
-#define INTEL_RAPL_RAM 0x3 /* pseudo-encoding */
-#define RAPL_IDX_PP1_NRG_STAT 3 /* gpu */
-#define INTEL_RAPL_PP1 0x4 /* pseudo-encoding */
-#define RAPL_IDX_PSYS_NRG_STAT 4 /* psys */
-#define INTEL_RAPL_PSYS 0x5 /* pseudo-encoding */
-
-#define NR_RAPL_DOMAINS 0x5
-
enum perf_rapl_events {
PERF_RAPL_PP0 = 0, /* all cores */
PERF_RAPL_PKG, /* entire package */
@@ -86,6 +74,7 @@ enum perf_rapl_events {
PERF_RAPL_PSYS, /* psys */
PERF_RAPL_MAX,
+ NR_RAPL_DOMAINS = PERF_RAPL_MAX,
};
static const char *const rapl_domain_names[NR_RAPL_DOMAINS] __initconst = {
@@ -149,6 +138,7 @@ static struct rapl_pmus *rapl_pmus;
static cpumask_t rapl_cpu_mask;
static unsigned int rapl_cntr_mask;
static u64 rapl_timer_ms;
+static struct perf_msr rapl_msrs[];
static inline struct rapl_pmu *cpu_to_rapl_pmu(unsigned int cpu)
{
@@ -340,7 +330,7 @@ static void rapl_pmu_event_del(struct perf_event *event, int flags)
static int rapl_pmu_event_init(struct perf_event *event)
{
u64 cfg = event->attr.config & RAPL_EVENT_MASK;
- int bit, msr, ret = 0;
+ int bit, ret = 0;
struct rapl_pmu *pmu;
/* only look at RAPL events */
@@ -356,33 +346,12 @@ static int rapl_pmu_event_init(struct perf_event *event)
event->event_caps |= PERF_EV_CAP_READ_ACTIVE_PKG;
- /*
- * check event is known (determines counter)
- */
- switch (cfg) {
- case INTEL_RAPL_PP0:
- bit = RAPL_IDX_PP0_NRG_STAT;
- msr = MSR_PP0_ENERGY_STATUS;
- break;
- case INTEL_RAPL_PKG:
- bit = RAPL_IDX_PKG_NRG_STAT;
- msr = MSR_PKG_ENERGY_STATUS;
- break;
- case INTEL_RAPL_RAM:
- bit = RAPL_IDX_RAM_NRG_STAT;
- msr = MSR_DRAM_ENERGY_STATUS;
- break;
- case INTEL_RAPL_PP1:
- bit = RAPL_IDX_PP1_NRG_STAT;
- msr = MSR_PP1_ENERGY_STATUS;
- break;
- case INTEL_RAPL_PSYS:
- bit = RAPL_IDX_PSYS_NRG_STAT;
- msr = MSR_PLATFORM_ENERGY_STATUS;
- break;
- default:
+ if (!cfg || cfg >= NR_RAPL_DOMAINS + 1)
return -EINVAL;
- }
+
+ cfg = array_index_nospec(cfg, NR_RAPL_DOMAINS + 1);
+ bit = cfg - 1;
+
/* check event supported */
if (!(rapl_cntr_mask & (1 << bit)))
return -EINVAL;
@@ -397,7 +366,7 @@ static int rapl_pmu_event_init(struct perf_event *event)
return -EINVAL;
event->cpu = pmu->cpu;
event->pmu_private = pmu;
- event->hw.event_base = msr;
+ event->hw.event_base = rapl_msrs[bit].msr;
event->hw.config = cfg;
event->hw.idx = bit;
@@ -705,7 +674,7 @@ static int rapl_check_hw_unit(bool apply_quirk)
* of 2. Datasheet, September 2014, Reference Number: 330784-001 "
*/
if (apply_quirk)
- rapl_hw_unit[RAPL_IDX_RAM_NRG_STAT] = 16;
+ rapl_hw_unit[PERF_RAPL_RAM] = 16;
/*
* Calculate the timer rate:
--
2.21.0
next prev parent reply other threads:[~2019-06-16 14:04 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-16 14:03 [PATCHv3 0/8] perf/x86: Rework msr probe interface Jiri Olsa
2019-06-16 14:03 ` [PATCH 1/8] perf/x86: Add " Jiri Olsa
2019-06-25 8:37 ` [tip:perf/core] perf/x86: Add MSR " tip-bot for Jiri Olsa
2019-06-16 14:03 ` [PATCH 2/8] perf/x86/msr: Use new probe function Jiri Olsa
2019-06-25 8:38 ` [tip:perf/core] " tip-bot for Jiri Olsa
2019-06-16 14:03 ` [PATCH 3/8] perf/x86/cstate: " Jiri Olsa
2019-06-25 8:39 ` [tip:perf/core] " tip-bot for Jiri Olsa
2019-06-16 14:03 ` [PATCH 4/8] perf/x86/rapl: Use new msr detection interface Jiri Olsa
2019-06-25 8:40 ` [tip:perf/core] perf/x86/rapl: Use new MSR " tip-bot for Jiri Olsa
2019-06-16 14:03 ` [PATCH 5/8] perf/x86/rapl: Get rapl_cntr_mask from new probe framework Jiri Olsa
2019-06-25 8:40 ` [tip:perf/core] " tip-bot for Jiri Olsa
2019-06-16 14:03 ` Jiri Olsa [this message]
2019-06-17 11:42 ` [PATCH 6/8] perf/x86/rapl: Get msr values " Peter Zijlstra
2019-06-25 8:41 ` [tip:perf/core] perf/x86/rapl: Get MSR " tip-bot for Jiri Olsa
2019-06-16 14:03 ` [PATCH 7/8] perf/x86/rapl: Get attributes " Jiri Olsa
2019-06-25 8:42 ` [tip:perf/core] " tip-bot for Jiri Olsa
2019-06-16 14:03 ` [PATCH 8/8] perf/x86/rapl: Get quirk state " Jiri Olsa
2019-06-25 8:43 ` [tip:perf/core] " tip-bot for Jiri Olsa
-- strict thread matches above, loose matches on Subject: below --
2019-05-31 12:09 [PATCHv2 0/8] perf/x86: Rework msr probe interface Jiri Olsa
2019-05-31 12:09 ` [PATCH 6/8] perf/x86/rapl: Get msr values from new probe framework Jiri Olsa
2019-05-27 21:51 [PATCH 0/8] perf/x86: Rework msr probe interface Jiri Olsa
2019-05-27 21:51 ` [PATCH 6/8] perf/x86/rapl: Get msr values from new probe framework Jiri Olsa
2019-03-18 18:21 [RFC 0/8] perf/x86: Add msr probe interface Jiri Olsa
2019-03-18 18:21 ` [PATCH 6/8] perf/x86/rapl: Get msr values from new probe framework Jiri Olsa
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190616140358.27799-7-jolsa@kernel.org \
--to=jolsa@kernel.org \
--cc=a.p.zijlstra@chello.nl \
--cc=acme@kernel.org \
--cc=ak@linux.intel.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=eranian@google.com \
--cc=gregkh@linuxfoundation.org \
--cc=kan.liang@linux.intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=luto@kernel.org \
--cc=mingo@kernel.org \
--cc=namhyung@kernel.org \
--cc=tglx@linutronix.de \
--cc=vincent.weaver@maine.edu \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).