From: Brian Masney <masneyb@onstation.org>
To: bjorn.andersson@linaro.org, agross@kernel.org,
david.brown@linaro.org, robdclark@gmail.com, sean@poorly.run,
robh+dt@kernel.org
Cc: airlied@linux.ie, daniel@ffwll.ch, mark.rutland@arm.com,
jonathan@marek.ca, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, devicetree@vger.kernel.org
Subject: [PATCH v2 1/6] dt-bindings: soc: qcom: add On Chip MEMory (OCMEM) bindings
Date: Tue, 18 Jun 2019 22:32:04 -0400 [thread overview]
Message-ID: <20190619023209.10036-2-masneyb@onstation.org> (raw)
In-Reply-To: <20190619023209.10036-1-masneyb@onstation.org>
Add device tree bindings for the On Chip Memory (OCMEM) that is present
on some Qualcomm Snapdragon SoCs.
Signed-off-by: Brian Masney <masneyb@onstation.org>
---
Changes since v1:
- Rename qcom,ocmem-msm8974 to qcom,msm8974-ocmem
- Renamed reg-names to ctrl and mem
- update hardware description
- moved from soc to sram namespace in the device tree bindings
.../bindings/sram/qcom/qcom,ocmem.yaml | 64 +++++++++++++++++++
1 file changed, 64 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sram/qcom/qcom,ocmem.yaml
diff --git a/Documentation/devicetree/bindings/sram/qcom/qcom,ocmem.yaml b/Documentation/devicetree/bindings/sram/qcom/qcom,ocmem.yaml
new file mode 100644
index 000000000000..1bd15824968e
--- /dev/null
+++ b/Documentation/devicetree/bindings/sram/qcom/qcom,ocmem.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sram/qcom/qcom,ocmem.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: On Chip Memory (OCMEM) that is present on some Qualcomm Snapdragon SoCs.
+
+maintainers:
+ - Brian Masney <masneyb@onstation.org>
+
+description: |
+ The On Chip Memory (OCMEM) is typically used by the GPU, camera/video, and
+ audio components on some Snapdragon SoCs.
+
+properties:
+ compatible:
+ const: qcom,msm8974-ocmem
+
+ reg:
+ items:
+ - description: Control registers
+ - description: OCMEM address range
+
+ reg-names:
+ items:
+ - const: ctrl
+ - const: mem
+
+ clocks:
+ items:
+ - description: Core clock
+ - description: Interface clock
+
+ clock-names:
+ items:
+ - const: core
+ - const: iface
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,rpmcc.h>
+ #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
+
+ ocmem: ocmem@fdd00000 {
+ compatible = "qcom,msm8974-ocmem";
+
+ reg = <0xfdd00000 0x2000>,
+ <0xfec00000 0x180000>;
+ reg-names = "ctrl",
+ "mem";
+
+ clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,
+ <&mmcc OCMEMCX_OCMEMNOC_CLK>;
+ clock-names = "core",
+ "iface";
+ };
--
2.20.1
next prev parent reply other threads:[~2019-06-19 2:32 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-19 2:32 [PATCH v2 0/6] qcom: add OCMEM support Brian Masney
2019-06-19 2:32 ` Brian Masney [this message]
2019-06-19 2:32 ` [PATCH v2 2/6] dt-bindings: display: msm: gmu: add optional ocmem property Brian Masney
2019-06-19 2:32 ` [PATCH v2 3/6] firmware: qcom: scm: add OCMEM lock/unlock interface Brian Masney
2019-06-19 2:32 ` [PATCH v2 4/6] firmware: qcom: scm: add support to restore secure config to qcm_scm-32 Brian Masney
2019-06-19 2:32 ` [PATCH v2 5/6] soc: qcom: add OCMEM driver Brian Masney
2019-06-19 10:27 ` Brian Masney
2019-06-19 2:32 ` [PATCH v2 6/6] drm/msm/gpu: add ocmem init/cleanup functions Brian Masney
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