On Tue, Jun 18, 2019 at 05:03:58PM +0300, Dmitry Osipenko wrote:
> Tegra's timer has 29 bits for the counter and for the "load" register
> which sets counter to a load-value. The counter's value is lower than
> the actual value by 1 because it starts to decrement after one tick,
> hence the maximum number of ticks that hardware can handle equals to
> 29 bits + 1.
> 
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>  drivers/clocksource/timer-tegra.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)

Acked-by: Thierry Reding <treding@nvidia.com>