From: Julien Grall <julien.grall@arm.com>
To: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu
Cc: james.morse@arm.com, marc.zyngier@arm.com,
julien.thierry@arm.com, suzuki.poulose@arm.com,
catalin.marinas@arm.com, will.deacon@arm.com,
Julien Grall <julien.grall@arm.com>
Subject: [RFC v2 02/14] arm64/mm: Move active_asids and reserved_asids to asid_info
Date: Thu, 20 Jun 2019 14:05:56 +0100 [thread overview]
Message-ID: <20190620130608.17230-3-julien.grall@arm.com> (raw)
In-Reply-To: <20190620130608.17230-1-julien.grall@arm.com>
The variables active_asids and reserved_asids hold information for a
given ASID allocator. So move them to the structure asid_info.
At the same time, introduce wrappers to access the active and reserved
ASIDs to make the code clearer.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
arch/arm64/mm/context.c | 34 ++++++++++++++++++++++------------
1 file changed, 22 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index 8167c369172d..6bacfc295f6e 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -34,10 +34,16 @@ static struct asid_info
{
atomic64_t generation;
unsigned long *map;
+ atomic64_t __percpu *active;
+ u64 __percpu *reserved;
} asid_info;
+#define active_asid(info, cpu) *per_cpu_ptr((info)->active, cpu)
+#define reserved_asid(info, cpu) *per_cpu_ptr((info)->reserved, cpu)
+
static DEFINE_PER_CPU(atomic64_t, active_asids);
static DEFINE_PER_CPU(u64, reserved_asids);
+
static cpumask_t tlb_flush_pending;
#define ASID_MASK (~GENMASK(asid_bits - 1, 0))
@@ -100,7 +106,7 @@ static void flush_context(struct asid_info *info)
bitmap_clear(info->map, 0, NUM_USER_ASIDS);
for_each_possible_cpu(i) {
- asid = atomic64_xchg_relaxed(&per_cpu(active_asids, i), 0);
+ asid = atomic64_xchg_relaxed(&active_asid(info, i), 0);
/*
* If this CPU has already been through a
* rollover, but hasn't run another task in
@@ -109,9 +115,9 @@ static void flush_context(struct asid_info *info)
* the process it is still running.
*/
if (asid == 0)
- asid = per_cpu(reserved_asids, i);
+ asid = reserved_asid(info, i);
__set_bit(asid2idx(asid), info->map);
- per_cpu(reserved_asids, i) = asid;
+ reserved_asid(info, i) = asid;
}
/*
@@ -121,7 +127,8 @@ static void flush_context(struct asid_info *info)
cpumask_setall(&tlb_flush_pending);
}
-static bool check_update_reserved_asid(u64 asid, u64 newasid)
+static bool check_update_reserved_asid(struct asid_info *info, u64 asid,
+ u64 newasid)
{
int cpu;
bool hit = false;
@@ -136,9 +143,9 @@ static bool check_update_reserved_asid(u64 asid, u64 newasid)
* generation.
*/
for_each_possible_cpu(cpu) {
- if (per_cpu(reserved_asids, cpu) == asid) {
+ if (reserved_asid(info, cpu) == asid) {
hit = true;
- per_cpu(reserved_asids, cpu) = newasid;
+ reserved_asid(info, cpu) = newasid;
}
}
@@ -158,7 +165,7 @@ static u64 new_context(struct asid_info *info, struct mm_struct *mm)
* If our current ASID was active during a rollover, we
* can continue to use it and this was just a false alarm.
*/
- if (check_update_reserved_asid(asid, newasid))
+ if (check_update_reserved_asid(info, asid, newasid))
return newasid;
/*
@@ -207,8 +214,8 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu)
/*
* The memory ordering here is subtle.
- * If our active_asids is non-zero and the ASID matches the current
- * generation, then we update the active_asids entry with a relaxed
+ * If our active_asid is non-zero and the ASID matches the current
+ * generation, then we update the active_asid entry with a relaxed
* cmpxchg. Racing with a concurrent rollover means that either:
*
* - We get a zero back from the cmpxchg and end up waiting on the
@@ -219,10 +226,10 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu)
* relaxed xchg in flush_context will treat us as reserved
* because atomic RmWs are totally ordered for a given location.
*/
- old_active_asid = atomic64_read(&per_cpu(active_asids, cpu));
+ old_active_asid = atomic64_read(&active_asid(info, cpu));
if (old_active_asid &&
!((asid ^ atomic64_read(&info->generation)) >> asid_bits) &&
- atomic64_cmpxchg_relaxed(&per_cpu(active_asids, cpu),
+ atomic64_cmpxchg_relaxed(&active_asid(info, cpu),
old_active_asid, asid))
goto switch_mm_fastpath;
@@ -237,7 +244,7 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu)
if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending))
local_flush_tlb_all();
- atomic64_set(&per_cpu(active_asids, cpu), asid);
+ atomic64_set(&active_asid(info, cpu), asid);
raw_spin_unlock_irqrestore(&cpu_asid_lock, flags);
switch_mm_fastpath:
@@ -278,6 +285,9 @@ static int asids_init(void)
panic("Failed to allocate bitmap for %lu ASIDs\n",
NUM_USER_ASIDS);
+ info->active = &active_asids;
+ info->reserved = &reserved_asids;
+
pr_info("ASID allocator initialised with %lu entries\n", NUM_USER_ASIDS);
return 0;
}
--
2.11.0
next prev parent reply other threads:[~2019-06-20 13:07 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-20 13:05 [RFC v2 00/14] kvm/arm: Align the VMID allocation with the arm64 ASID one Julien Grall
2019-06-20 13:05 ` [RFC v2 01/14] arm64/mm: Introduce asid_info structure and move asid_generation/asid_map to it Julien Grall
2019-06-20 13:05 ` Julien Grall [this message]
2019-06-20 13:05 ` [RFC v2 03/14] arm64/mm: Move bits to asid_info Julien Grall
2019-06-20 13:05 ` [RFC v2 04/14] arm64/mm: Move the variable lock and tlb_flush_pending " Julien Grall
2019-06-20 13:05 ` [RFC v2 05/14] arm64/mm: Remove dependency on MM in new_context Julien Grall
2019-06-20 13:06 ` [RFC v2 06/14] arm64/mm: Store the number of asid allocated per context Julien Grall
2019-06-20 13:06 ` [RFC v2 07/14] arm64/mm: Introduce NUM_ASIDS Julien Grall
2019-06-20 13:06 ` [RFC v2 08/14] arm64/mm: Split asid_inits in 2 parts Julien Grall
2019-06-20 13:06 ` [RFC v2 09/14] arm64/mm: Split the function check_and_switch_context in 3 parts Julien Grall
2019-06-20 13:06 ` [RFC v2 10/14] arm64/mm: Introduce a callback to flush the local context Julien Grall
2019-06-20 13:06 ` [RFC v2 11/14] arm64: Move the ASID allocator code in a separate file Julien Grall
2019-07-04 14:56 ` James Morse
2019-07-15 10:58 ` Julien Grall
2019-06-20 13:06 ` [RFC v2 12/14] arm64/lib: asid: Allow user to update the context under the lock Julien Grall
2019-07-03 17:35 ` James Morse
2019-07-15 14:38 ` Julien Grall
2019-06-20 13:06 ` [RFC v2 13/14] arm/kvm: Introduce a new VMID allocator Julien Grall
2019-06-20 13:06 ` [RFC v2 14/14] kvm/arm: Align the VMID allocation with the arm64 ASID one Julien Grall
2019-07-03 17:36 ` James Morse
2019-07-15 17:06 ` Julien Grall
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