From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0591C76191 for ; Mon, 15 Jul 2019 14:09:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 98EBB20868 for ; Mon, 15 Jul 2019 14:09:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1563199772; bh=hA1BGIYycUI7Cx54KZzbIMC+IwY3xhFaUuVmGlLmviE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=k8l8vvsFa9jmdGWIN1cC/hfl0yQ1qnBsiY/ewKR/T6mqm+QQlelmDF0bVa0XlPWfb tpKZC4lCn0uCn2tlncuiGxYWvfmkUtGqfEWb+xKwiyCKL3J8dtK2JvJWEO4Gpbvj1J 1JMRdaTTWyPDjvnyGKt4B3FZK5KTd0CzwmVdrW10= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388318AbfGOOJb (ORCPT ); Mon, 15 Jul 2019 10:09:31 -0400 Received: from mail.kernel.org ([198.145.29.99]:32908 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388697AbfGOOJ1 (ORCPT ); Mon, 15 Jul 2019 10:09:27 -0400 Received: from sasha-vm.mshome.net (unknown [73.61.17.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DE4E321537; Mon, 15 Jul 2019 14:09:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1563199766; bh=hA1BGIYycUI7Cx54KZzbIMC+IwY3xhFaUuVmGlLmviE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=z17ZLVej+91SKpbWXkfFK11VE/lP5eyau6Tp+7GH2YIFUiKrE9gBRquaHDnk5qx2I QdyUa+4jq1ZJT+D/VR3tCYJGLkgaJinC6v+Cv+pyuu2bD3460PQUwPFOjdvlgdLEY0 JabgMZtOJhCHzwF952fI2H9FjqYGWENqIkoKZpzY= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Jiri Olsa , Tom Vaden , Jiri Olsa , Peter Zijlstra , Alexander Shishkin , Arnaldo Carvalho de Melo , Liang Kan , Linus Torvalds , Namhyung Kim , Thomas Gleixner , Ingo Molnar , Sasha Levin Subject: [PATCH AUTOSEL 5.1 100/219] perf/x86/intel: Disable check_msr for real HW Date: Mon, 15 Jul 2019 10:01:41 -0400 Message-Id: <20190715140341.6443-100-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190715140341.6443-1-sashal@kernel.org> References: <20190715140341.6443-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jiri Olsa [ Upstream commit d0e1a507bdc761a14906f03399d933ea639a1756 ] Tom Vaden reported false failure of the check_msr() function, because some servers can do POST tracing and enable LBR tracing during bootup. Kan confirmed that check_msr patch was to fix a bug report in guest, so it's ok to disable it for real HW. Reported-by: Tom Vaden Signed-off-by: Jiri Olsa Signed-off-by: Peter Zijlstra (Intel) Acked-by: Tom Vaden Cc: Alexander Shishkin Cc: Arnaldo Carvalho de Melo Cc: Liang Kan Cc: Linus Torvalds Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Thomas Gleixner Link: https://lkml.kernel.org/r/20190616141313.GD2500@krava [ Readability edits. ] Signed-off-by: Ingo Molnar Signed-off-by: Sasha Levin --- arch/x86/events/intel/core.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 82dad001d1ea..a50e182c38b6 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "../perf_event.h" @@ -3927,6 +3928,13 @@ static bool check_msr(unsigned long msr, u64 mask) { u64 val_old, val_new, val_tmp; + /* + * Disable the check for real HW, so we don't + * mess with potentionaly enabled registers: + */ + if (hypervisor_is_type(X86_HYPER_NATIVE)) + return true; + /* * Read the current value, change it and read it back to see if it * matches, this is needed to detect certain hardware emulators -- 2.20.1