From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FA67C7618F for ; Mon, 15 Jul 2019 14:12:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2F1B02081C for ; Mon, 15 Jul 2019 14:12:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1563199927; bh=cxYmZPbX48n7U/WHfvLRzQCWQMmaFgQ+XSLKQ43DekE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=EfA6Y0s/aYiWo9AqpXd0eu/QLHPlw4dvC+GGBjLRLcG6XwnAKvlSbVXYZ75Jg1C6x MmpoIJod+OYrbNhMULDeOcdKHWmOc2nfUJePfMcOeKjqYtcO8jVNgL6EzrWRXqKeIp jTnXezo9+8HYY5z9AAmxiZfZyCZ3K2qBaWXkhMO0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732384AbfGOOMG (ORCPT ); Mon, 15 Jul 2019 10:12:06 -0400 Received: from mail.kernel.org ([198.145.29.99]:49574 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388827AbfGOOMC (ORCPT ); Mon, 15 Jul 2019 10:12:02 -0400 Received: from sasha-vm.mshome.net (unknown [73.61.17.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1C310206B8; Mon, 15 Jul 2019 14:11:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1563199921; bh=cxYmZPbX48n7U/WHfvLRzQCWQMmaFgQ+XSLKQ43DekE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uxfL989WYx4gH54HqHrrrz1jVZ7964N4hKZkTHybVsLegaV8KJ8owJ8QjH136KpX1 +DlErEBJ/boVYn9RnPWLLrwZyuQMm7flCnK7pWqhF1vD6AYXBmhYRaFWHL2W7gutoN yvUA1wCKQgTO+hKdF+nhEljQGLPOMxA7TIYIYASQ= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Icenowy Zheng , Ondrej Jirman , "David S . Miller" , Sasha Levin , netdev@vger.kernel.org Subject: [PATCH AUTOSEL 5.1 138/219] net: stmmac: sun8i: force select external PHY when no internal one Date: Mon, 15 Jul 2019 10:02:19 -0400 Message-Id: <20190715140341.6443-138-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190715140341.6443-1-sashal@kernel.org> References: <20190715140341.6443-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Icenowy Zheng [ Upstream commit 0fec7e72ae1391bb2d7527efb54fe6ae88acabce ] The PHY selection bit also exists on SoCs without an internal PHY; if it's set to 1 (internal PHY, default value) then the MAC will not make use of any PHY on such SoCs. This problem appears when adapting for H6, which has no real internal PHY (the "internal PHY" on H6 is not on-die, but on a co-packaged AC200 chip, connected via RMII interface at GPIO bank A). Force the PHY selection bit to 0 when the SOC doesn't have an internal PHY, to address the problem of a wrong default value. Signed-off-by: Icenowy Zheng Signed-off-by: Ondrej Jirman Signed-off-by: David S. Miller Signed-off-by: Sasha Levin --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c index ba124a4da793..8325e6499739 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c @@ -893,6 +893,11 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv) * address. No need to mask it again. */ reg |= 1 << H3_EPHY_ADDR_SHIFT; + } else { + /* For SoCs without internal PHY the PHY selection bit should be + * set to 0 (external PHY). + */ + reg &= ~H3_EPHY_SELECT; } if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) { -- 2.20.1