From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D404EC76186 for ; Tue, 30 Jul 2019 02:21:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B48EC20578 for ; Tue, 30 Jul 2019 02:21:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731202AbfG3CV5 (ORCPT ); Mon, 29 Jul 2019 22:21:57 -0400 Received: from mx.socionext.com ([202.248.49.38]:54792 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729020AbfG3CV5 (ORCPT ); Mon, 29 Jul 2019 22:21:57 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 30 Jul 2019 11:21:54 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id 31EDE180B6E; Tue, 30 Jul 2019 11:21:55 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 30 Jul 2019 11:21:55 +0900 Received: from yuzu.css.socionext.com (yuzu [172.31.8.45]) by kinkan.css.socionext.com (Postfix) with ESMTP id 00E801A04E1; Tue, 30 Jul 2019 11:21:55 +0900 (JST) Received: from [127.0.0.1] (unknown [10.213.132.48]) by yuzu.css.socionext.com (Postfix) with ESMTP id D373B120C1E; Tue, 30 Jul 2019 11:21:54 +0900 (JST) Date: Tue, 30 Jul 2019 11:21:54 +0900 From: Kunihiko Hayashi To: Masahiro Yamada Subject: Re: [PATCH 1/5] pinctrl: uniphier: Separate modem group from UART ctsrts group Cc: Linus Walleij , "open list:GPIO SUBSYSTEM" , linux-arm-kernel , Linux Kernel Mailing List , Masami Hiramatsu , Jassi Brar In-Reply-To: References: <1562668156-12927-2-git-send-email-hayashi.kunihiko@socionext.com> Message-Id: <20190730112153.F396.4A936039@socionext.com> MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Mailer: Becky! ver. 2.70 [ja] Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, On Mon, 29 Jul 2019 22:45:01 +0900 wrote: > On Tue, Jul 9, 2019 at 7:29 PM Kunihiko Hayashi > wrote: > > > > It depends on the board implementation whether to have each pins of > > CTS/RTS, and others for modem. So it is necessary to divide current > > uart_ctsrts group into uart_ctsrts and uart_modem groups. > > > > Since the number of implemented pins for modem differs depending > > on SoC, each uart_modem group also has a different number of pins. > > > > Signed-off-by: Kunihiko Hayashi > > --- > > > diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c > > index 414ff3a..d1ed5b7 100644 > > --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c > > +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c > > @@ -780,8 +780,10 @@ static const unsigned system_bus_cs5_pins[] = {55}; > > static const int system_bus_cs5_muxvals[] = {6}; > > static const unsigned uart0_pins[] = {135, 136}; > > static const int uart0_muxvals[] = {3, 3}; > > -static const unsigned uart0_ctsrts_pins[] = {137, 138, 139, 140, 141, 124}; > > -static const int uart0_ctsrts_muxvals[] = {3, 3, 3, 3, 3, 3}; > > +static const unsigned uart0_ctsrts_pins[] = {137, 139}; > > +static const int uart0_ctsrts_muxvals[] = {3, 3}; > > +static const unsigned uart0_modem_pins[] = {138, 140, 141, 124}; > > Please sort this array > while you are here. Thank you for pointing out. I'll sort it in v2. > > Otherwise, looks good to me. > > > > > > > -- > Best Regards > Masahiro Yamada --- Best Regards, Kunihiko Hayashi