From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F70FC76186 for ; Tue, 30 Jul 2019 02:22:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 005482064A for ; Tue, 30 Jul 2019 02:22:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731228AbfG3CWN (ORCPT ); Mon, 29 Jul 2019 22:22:13 -0400 Received: from mx.socionext.com ([202.248.49.38]:54804 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729020AbfG3CWN (ORCPT ); Mon, 29 Jul 2019 22:22:13 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 30 Jul 2019 11:22:10 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id AB03B180B6E; Tue, 30 Jul 2019 11:22:10 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 30 Jul 2019 11:22:10 +0900 Received: from yuzu.css.socionext.com (yuzu [172.31.8.45]) by kinkan.css.socionext.com (Postfix) with ESMTP id 5B0BA1A04E1; Tue, 30 Jul 2019 11:22:10 +0900 (JST) Received: from [127.0.0.1] (unknown [10.213.132.48]) by yuzu.css.socionext.com (Postfix) with ESMTP id 37DE9120C1E; Tue, 30 Jul 2019 11:22:10 +0900 (JST) Date: Tue, 30 Jul 2019 11:22:10 +0900 From: Kunihiko Hayashi To: Masahiro Yamada Subject: Re: [PATCH 4/5] pinctrl: uniphier: Add Pro5 PCIe pin-mux settings Cc: Linus Walleij , "open list:GPIO SUBSYSTEM" , linux-arm-kernel , Linux Kernel Mailing List , Masami Hiramatsu , Jassi Brar In-Reply-To: References: <1562668156-12927-5-git-send-email-hayashi.kunihiko@socionext.com> Message-Id: <20190730112209.F398.4A936039@socionext.com> MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Mailer: Becky! ver. 2.70 [ja] Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, On Mon, 29 Jul 2019 22:46:02 +0900 wrote: > On Tue, Jul 9, 2019 at 7:29 PM Kunihiko Hayashi > wrote: > > > > Pro5 PCIe interface uses the following pins: > > XPERST, XPEWAKE, XPECLKRQ > > > > Signed-off-by: Kunihiko Hayashi > > --- > > drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c > > index 1d418e3..577f12e 100644 > > --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c > > +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c > > @@ -855,6 +855,8 @@ static const unsigned usb1_pins[] = {126, 127}; > > static const int usb1_muxvals[] = {0, 0}; > > static const unsigned usb2_pins[] = {128, 129}; > > static const int usb2_muxvals[] = {0, 0}; > > +static const unsigned pcie_pins[] = {109, 110, 111}; > > +static const int pcie_muxvals[] = {0, 0, 0}; > > Please keep the alphabetical sorting. I made mistake in adding it. Okay, I'll sort it including below in v2. > > static const unsigned int gpio_range_pins[] = { > > 89, 90, 91, 92, 93, 94, 95, 96, /* PORT0x */ > > 97, 98, 99, 100, 101, 102, 103, 104, /* PORT1x */ > > @@ -925,6 +927,7 @@ static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = { > > UNIPHIER_PINCTRL_GROUP(usb0), > > UNIPHIER_PINCTRL_GROUP(usb1), > > UNIPHIER_PINCTRL_GROUP(usb2), > > + UNIPHIER_PINCTRL_GROUP(pcie), > > Ditto. > > > UNIPHIER_PINCTRL_GROUP_GPIO(gpio_range), > > }; > > > > @@ -957,6 +960,7 @@ static const char * const uart3_groups[] = {"uart3"}; > > static const char * const usb0_groups[] = {"usb0"}; > > static const char * const usb1_groups[] = {"usb1"}; > > static const char * const usb2_groups[] = {"usb2"}; > > +static const char * const pcie_groups[] = {"pcie"}; > > > > static const struct uniphier_pinmux_function uniphier_pro5_functions[] = { > > UNIPHIER_PINMUX_FUNCTION(emmc), > > @@ -979,6 +983,7 @@ static const struct uniphier_pinmux_function uniphier_pro5_functions[] = { > > UNIPHIER_PINMUX_FUNCTION(usb0), > > UNIPHIER_PINMUX_FUNCTION(usb1), > > UNIPHIER_PINMUX_FUNCTION(usb2), > > + UNIPHIER_PINMUX_FUNCTION(pcie), > > Ditto. > > > > > }; > > > > static int uniphier_pro5_get_gpio_muxval(unsigned int pin, > > -- > > 2.7.4 > > > > > -- > Best Regards > Masahiro Yamada --- Best Regards, Kunihiko Hayashi