From: <Tudor.Ambarus@microchip.com>
To: <boris.brezillon@collabora.com>, <marek.vasut@gmail.com>,
<vigneshr@ti.com>
Cc: <dwmw2@infradead.org>, <computersforpeace@gmail.com>,
<miquel.raynal@bootlin.com>, <richard@nod.at>,
<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<Tudor.Ambarus@microchip.com>
Subject: [PATCH 0/7] mtd: spi-nor: move manuf out of the core - batch 1
Date: Wed, 31 Jul 2019 09:03:25 +0000 [thread overview]
Message-ID: <20190731090315.26798-1-tudor.ambarus@microchip.com> (raw)
From: Tudor Ambarus <tudor.ambarus@microchip.com>
The scope of the "mtd: spi-nor: move manuf out of the core" batches,
is to move all manufacturer specific code out of the spi-nor core.
In the quest of removing the manufacturer specific code from the spi-nor
core, we want to impose a timeline/priority on how the flash parameters
are updated. As of now. the flash parameters initialization logic is as
following:
a/ default flash parameters init in spi_nor_init_params()
b/ manufacturer specific flash parameters updates, split across entire
spi-nor core code
c/ flash parameters updates based on SFDP tables
d/ post BFPT flash parameter updates
With the "mtd: spi-nor: move manuf out of the core" batches, we want to
impose the following sequence of calls:
1/ spi-nor core legacy flash parameters init:
spi_nor_default_init_params()
2/ MFR-based manufacturer flash parameters init:
nor->manufacturer->fixups->default_init()
3/ specific flash_info tweeks done when decisions can not be done just on
MFR:
nor->info->fixups->default_init()
4/ SFDP tables flash parameters init - SFDP knows better:
spi_nor_sfdp_init_params()
5/ post SFDP tables flash parameters updates - in case manufacturers get
the serial flash tables wrong or incomplete.
nor->info->fixups->post_sfdp()
The later can be extended to nor->manufacturer->fixups->post_sfdp() if
needed.
Setting of flash paramters will no longer be spread interleaved accross
the spi-nor core, there will be a clear separation on who and when will update
the flash parameters.
Tested on sst26vf064b with atmel-quadspi SPIMEM driver.
These batches are based of Boris Brezillon's work at:
https://patchwork.ozlabs.org/project/linux-mtd/list/?series=80353
These batches depend on m25p80 code move and a recent fix:
https://patchwork.ozlabs.org/project/linux-mtd/list/?series=120475
https://patchwork.ozlabs.org/project/linux-mtd/list/?series=122416
You can find my developing branch (not stable) at:
https://github.com/ambarus/linux-0day/tree/spi-nor/manuf-drv
Boris Brezillon (3):
mtd: spi-nor: Add a default_init() fixup hook for gd25q256
mtd: spi-nor: Create a ->set_4byte() method
mtd: spi-nor: Rework the SPI NOR lock/unlock logic
Tudor Ambarus (4):
mtd: spi-nor: Add default_init() hook to tweak flash parameters
mtd: spi_nor: Rework quad_enable()
mtd: spi-nor: Split spi_nor_init_params()
mtd: spi-nor: Rework the disabling of write protection at init
drivers/mtd/spi-nor/spi-nor.c | 417 ++++++++++++++++++++++++------------------
include/linux/mtd/spi-nor.h | 23 ++-
2 files changed, 260 insertions(+), 180 deletions(-)
--
2.9.5
next reply other threads:[~2019-07-31 9:03 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-31 9:03 Tudor.Ambarus [this message]
2019-07-31 9:03 ` [PATCH 1/7] mtd: spi-nor: Add default_init() hook to tweak flash parameters Tudor.Ambarus
2019-08-01 6:24 ` Boris Brezillon
2019-07-31 9:03 ` [PATCH 2/7] mtd: spi-nor: Add a default_init() fixup hook for gd25q256 Tudor.Ambarus
2019-07-31 9:03 ` [PATCH 3/7] mtd: spi_nor: Rework quad_enable() Tudor.Ambarus
2019-08-01 6:29 ` Boris Brezillon
2019-08-05 7:43 ` Tudor.Ambarus
2019-07-31 9:03 ` [PATCH 4/7] mtd: spi-nor: Split spi_nor_init_params() Tudor.Ambarus
2019-08-01 6:31 ` Boris Brezillon
2019-07-31 9:03 ` [PATCH 5/7] mtd: spi-nor: Create a ->set_4byte() method Tudor.Ambarus
2019-07-31 9:03 ` [PATCH 6/7] mtd: spi-nor: Rework the SPI NOR lock/unlock logic Tudor.Ambarus
2019-08-04 14:36 ` Vignesh Raghavendra
2019-08-05 8:00 ` Tudor.Ambarus
2019-08-05 11:29 ` Vignesh Raghavendra
2019-07-31 9:03 ` [PATCH 7/7] mtd: spi-nor: Rework the disabling of write protection at init Tudor.Ambarus
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