* [PATCH v3] mailbox: imx: add support for imx v1 mu
@ 2019-07-31 8:51 Richard Zhu
2019-08-01 14:47 ` Daniel Baluta
2019-08-02 3:54 ` Daniel Baluta
0 siblings, 2 replies; 7+ messages in thread
From: Richard Zhu @ 2019-07-31 8:51 UTC (permalink / raw)
To: jassisinghbrar, o.rempel, aisheng.dong
Cc: linux-kernel, linux-arm-kernel, Richard Zhu
There is a version1.0 MU on i.MX7ULP platform.
One new version ID register is added, and it's offset is 0.
TRn registers are defined at the offset 0x20 ~ 0x2C.
RRn registers are defined at the offset 0x40 ~ 0x4C.
SR/CR registers are defined at 0x60/0x64.
Extend this driver to support it.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Suggested-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
Change logs:
v2 --> v3:
- Format the patch-set refer to Oleksij's guidance.
- Init the register array by a simple way recommended by Oleksij.
- Add Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> tag.
v1 --> v2:
- Use to have the register layout linked on probe, suggested by
Oleksij Rempel <o.rempel@pengutronix.de>.
- Add Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> tag.
Richard Zhu (1):
mailbox: imx: add support for imx v1 mu
drivers/mailbox/imx-mailbox.c | 55 ++++++++++++++++++++++++++++++-------------
1 file changed, 38 insertions(+), 17 deletions(-)
diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
index 25be8bb..c81be1c 100644
--- a/drivers/mailbox/imx-mailbox.c
+++ b/drivers/mailbox/imx-mailbox.c
@@ -12,19 +12,11 @@
#include <linux/of_device.h>
#include <linux/slab.h>
-/* Transmit Register */
-#define IMX_MU_xTRn(x) (0x00 + 4 * (x))
-/* Receive Register */
-#define IMX_MU_xRRn(x) (0x10 + 4 * (x))
-/* Status Register */
-#define IMX_MU_xSR 0x20
#define IMX_MU_xSR_GIPn(x) BIT(28 + (3 - (x)))
#define IMX_MU_xSR_RFn(x) BIT(24 + (3 - (x)))
#define IMX_MU_xSR_TEn(x) BIT(20 + (3 - (x)))
#define IMX_MU_xSR_BRDIP BIT(9)
-/* Control Register */
-#define IMX_MU_xCR 0x24
/* General Purpose Interrupt Enable */
#define IMX_MU_xCR_GIEn(x) BIT(28 + (3 - (x)))
/* Receive Interrupt Enable */
@@ -44,6 +36,13 @@ enum imx_mu_chan_type {
IMX_MU_TYPE_RXDB, /* Rx doorbell */
};
+struct imx_mu_dcfg {
+ u32 xTR[4]; /* Transmit Registers */
+ u32 xRR[4]; /* Receive Registers */
+ u32 xSR; /* Status Register */
+ u32 xCR; /* Control Register */
+};
+
struct imx_mu_con_priv {
unsigned int idx;
char irq_desc[IMX_MU_CHAN_NAME_SIZE];
@@ -61,12 +60,27 @@ struct imx_mu_priv {
struct mbox_chan mbox_chans[IMX_MU_CHANS];
struct imx_mu_con_priv con_priv[IMX_MU_CHANS];
+ const struct imx_mu_dcfg *dcfg;
struct clk *clk;
int irq;
bool side_b;
};
+static const struct imx_mu_dcfg imx_mu_cfg_imx6sx = {
+ .xTR = {0x0, 0x4, 0x8, 0xc},
+ .xRR = {0x10, 0x14, 0x18, 0x1c},
+ .xSR = 0x20,
+ .xCR = 0x24,
+};
+
+static const struct imx_mu_dcfg imx_mu_cfg_imx7ulp = {
+ .xTR = {0x20, 0x24, 0x28, 0x2c},
+ .xRR = {0x40, 0x44, 0x48, 0x4c},
+ .xSR = 0x60,
+ .xCR = 0x64,
+};
+
static struct imx_mu_priv *to_imx_mu_priv(struct mbox_controller *mbox)
{
return container_of(mbox, struct imx_mu_priv, mbox);
@@ -88,10 +102,10 @@ static u32 imx_mu_xcr_rmw(struct imx_mu_priv *priv, u32 set, u32 clr)
u32 val;
spin_lock_irqsave(&priv->xcr_lock, flags);
- val = imx_mu_read(priv, IMX_MU_xCR);
+ val = imx_mu_read(priv, priv->dcfg->xCR);
val &= ~clr;
val |= set;
- imx_mu_write(priv, val, IMX_MU_xCR);
+ imx_mu_write(priv, val, priv->dcfg->xCR);
spin_unlock_irqrestore(&priv->xcr_lock, flags);
return val;
@@ -111,8 +125,8 @@ static irqreturn_t imx_mu_isr(int irq, void *p)
struct imx_mu_con_priv *cp = chan->con_priv;
u32 val, ctrl, dat;
- ctrl = imx_mu_read(priv, IMX_MU_xCR);
- val = imx_mu_read(priv, IMX_MU_xSR);
+ ctrl = imx_mu_read(priv, priv->dcfg->xCR);
+ val = imx_mu_read(priv, priv->dcfg->xSR);
switch (cp->type) {
case IMX_MU_TYPE_TX:
@@ -138,10 +152,10 @@ static irqreturn_t imx_mu_isr(int irq, void *p)
imx_mu_xcr_rmw(priv, 0, IMX_MU_xCR_TIEn(cp->idx));
mbox_chan_txdone(chan, 0);
} else if (val == IMX_MU_xSR_RFn(cp->idx)) {
- dat = imx_mu_read(priv, IMX_MU_xRRn(cp->idx));
+ dat = imx_mu_read(priv, priv->dcfg->xRR[cp->idx]);
mbox_chan_received_data(chan, (void *)&dat);
} else if (val == IMX_MU_xSR_GIPn(cp->idx)) {
- imx_mu_write(priv, IMX_MU_xSR_GIPn(cp->idx), IMX_MU_xSR);
+ imx_mu_write(priv, IMX_MU_xSR_GIPn(cp->idx), priv->dcfg->xSR);
mbox_chan_received_data(chan, NULL);
} else {
dev_warn_ratelimited(priv->dev, "Not handled interrupt\n");
@@ -159,7 +173,7 @@ static int imx_mu_send_data(struct mbox_chan *chan, void *data)
switch (cp->type) {
case IMX_MU_TYPE_TX:
- imx_mu_write(priv, *arg, IMX_MU_xTRn(cp->idx));
+ imx_mu_write(priv, *arg, priv->dcfg->xTR[cp->idx]);
imx_mu_xcr_rmw(priv, IMX_MU_xCR_TIEn(cp->idx), 0);
break;
case IMX_MU_TYPE_TXDB:
@@ -257,7 +271,7 @@ static void imx_mu_init_generic(struct imx_mu_priv *priv)
return;
/* Set default MU configuration */
- imx_mu_write(priv, 0, IMX_MU_xCR);
+ imx_mu_write(priv, 0, priv->dcfg->xCR);
}
static int imx_mu_probe(struct platform_device *pdev)
@@ -265,6 +279,7 @@ static int imx_mu_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
struct imx_mu_priv *priv;
+ const struct imx_mu_dcfg *dcfg;
unsigned int i;
int ret;
@@ -282,6 +297,11 @@ static int imx_mu_probe(struct platform_device *pdev)
if (priv->irq < 0)
return priv->irq;
+ dcfg = of_device_get_match_data(dev);
+ if (!dcfg)
+ return -EINVAL;
+ priv->dcfg = dcfg;
+
priv->clk = devm_clk_get(dev, NULL);
if (IS_ERR(priv->clk)) {
if (PTR_ERR(priv->clk) != -ENOENT)
@@ -335,7 +355,8 @@ static int imx_mu_remove(struct platform_device *pdev)
}
static const struct of_device_id imx_mu_dt_ids[] = {
- { .compatible = "fsl,imx6sx-mu" },
+ { .compatible = "fsl,imx7ulp-mu", .data = &imx_mu_cfg_imx7ulp },
+ { .compatible = "fsl,imx6sx-mu", .data = &imx_mu_cfg_imx6sx },
{ },
};
MODULE_DEVICE_TABLE(of, imx_mu_dt_ids);
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v3] mailbox: imx: add support for imx v1 mu
2019-07-31 8:51 [PATCH v3] mailbox: imx: add support for imx v1 mu Richard Zhu
@ 2019-08-01 14:47 ` Daniel Baluta
2019-08-02 3:24 ` [EXT] " Richard Zhu
2019-08-02 3:54 ` Daniel Baluta
1 sibling, 1 reply; 7+ messages in thread
From: Daniel Baluta @ 2019-08-01 14:47 UTC (permalink / raw)
To: Richard Zhu
Cc: jassisinghbrar, Oleksij Rempel, Aisheng Dong,
Linux Kernel Mailing List, linux-arm-kernel, dl-linux-imx
[-- Attachment #1: Type: text/plain, Size: 923 bytes --]
Hi Richard,
Thanks for the patch. Please always add linux-imx@nxp.com mailing
list for imx related patches. I missed it.
Few comments inline.
Please also update in a separate patch attached to this series
the devictree bindings doc Documentation/devicetree/bindings/mailbox/fsl,mu.txt
by adding description for mx7ulp-mu
<snip>
> There is a version1.0 MU on i.MX7ULP platform.
space between version and 1.0
> One new version ID register is added, and it's offset is 0.
> TRn registers are defined at the offset 0x20 ~ 0x2C.
> RRn registers are defined at the offset 0x40 ~ 0x4C.
> SR/CR registers are defined at 0x60/0x64.
> Extend this driver to support it.
Do you have a little bit of history about MU versioning? So there was:
* version 0.5 on i.MX6-es
* version 1.0 on i.MX7ULP
Next, is this 1.0 compatbile with i.MX8 right?
Also, can you please rebase your patch on my 2 bugfixes attached?
thanks,
Daniel.
[-- Attachment #2: 0002-mailbox-imx-Clear-the-right-interrupts-at-shutdown.patch --]
[-- Type: text/x-patch, Size: 1275 bytes --]
From f9f382b8cab2cf88abf7fb26b885ac96e0cbaff4 Mon Sep 17 00:00:00 2001
From: Daniel Baluta <daniel.baluta@nxp.com>
Date: Thu, 1 Aug 2019 17:41:25 +0300
Subject: [PATCH 2/2] mailbox: imx: Clear the right interrupts at shutdown
Make sure to only clear enabled interrupts keeping count
of the connection type.
Suggested-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
---
drivers/mailbox/imx-mailbox.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
index 957c10c4e674..3ecebdc7f913 100644
--- a/drivers/mailbox/imx-mailbox.c
+++ b/drivers/mailbox/imx-mailbox.c
@@ -219,8 +219,19 @@ static void imx_mu_shutdown(struct mbox_chan *chan)
return;
}
- imx_mu_xcr_rmw(priv, 0, IMX_MU_xCR_TIEn(cp->idx) |
- IMX_MU_xCR_RIEn(cp->idx) | IMX_MU_xCR_GIEn(cp->idx));
+ switch (cp->type) {
+ case IMX_MU_TYPE_TX:
+ imx_mu_xcr_rmw(priv, 0, IMX_MU_xCR_TIEn(cp->idx));
+ break;
+ case IMX_MU_TYPE_RX:
+ imx_mu_xcr_rmw(priv, 0, IMX_MU_xCR_RIEn(cp->idx));
+ break;
+ case IMX_MU_TYPE_RXDB:
+ imx_mu_xcr_rmw(priv, 0, IMX_MU_xCR_GIEn(cp->idx));
+ break;
+ default:
+ break;
+ }
free_irq(priv->irq, chan);
}
--
2.17.1
[-- Attachment #3: 0001-mailbox-imx-Fix-Tx-doorbell-shutdown-path.patch --]
[-- Type: text/x-patch, Size: 2937 bytes --]
From 8c7670c9198336f5e83f8322cb94ba776b759125 Mon Sep 17 00:00:00 2001
From: Daniel Baluta <daniel.baluta@nxp.com>
Date: Wed, 31 Jul 2019 23:47:29 +0300
Subject: [PATCH 1/2] mailbox: imx: Fix Tx doorbell shutdown path
Tx doorbell is handled by txdb_tasklet and doesn't
have an associated IRQ.
Anyhow, imx_mu_shutdown ignores this and tries to
free an IRQ that wasn't requested for Tx DB resulting
in the following warning:
[ 1.967644] Trying to free already-free IRQ 26
[ 1.972108] WARNING: CPU: 2 PID: 157 at kernel/irq/manage.c:1708 __free_irq+0xc0/0x358
[ 1.980024] Modules linked in:
[ 1.983088] CPU: 2 PID: 157 Comm: kworker/2:1 Tainted: G
[ 1.993524] Hardware name: Freescale i.MX8QXP MEK (DT)
[ 1.998668] Workqueue: events deferred_probe_work_func
[ 2.003812] pstate: 60000085 (nZCv daIf -PAN -UAO)
[ 2.008607] pc : __free_irq+0xc0/0x358
[ 2.012364] lr : __free_irq+0xc0/0x358
[ 2.016111] sp : ffff00001179b7e0
[ 2.019422] x29: ffff00001179b7e0 x28: 0000000000000018
[ 2.024736] x27: ffff000011233000 x26: 0000000000000004
[ 2.030053] x25: 000000000000001a x24: ffff80083bec74d4
[ 2.035369] x23: 0000000000000000 x22: ffff80083bec7588
[ 2.040686] x21: ffff80083b1fe8d8 x20: ffff80083bec7400
[ 2.046003] x19: 0000000000000000 x18: ffffffffffffffff
[ 2.051320] x17: 0000000000000000 x16: 0000000000000000
[ 2.056637] x15: ffff0000111296c8 x14: ffff00009179b517
[ 2.061953] x13: ffff00001179b525 x12: ffff000011142000
[ 2.067270] x11: ffff000011129f20 x10: ffff0000105da970
[ 2.072587] x9 : 00000000ffffffd0 x8 : 0000000000000194
[ 2.077903] x7 : 612065657266206f x6 : ffff0000111e7b09
[ 2.083220] x5 : 0000000000000003 x4 : 0000000000000000
[ 2.088537] x3 : 0000000000000000 x2 : 00000000ffffffff
[ 2.093854] x1 : 28b70f0a2b60a500 x0 : 0000000000000000
[ 2.099173] Call trace:
[ 2.101618] __free_irq+0xc0/0x358
[ 2.105021] free_irq+0x38/0x98
[ 2.108170] imx_mu_shutdown+0x90/0xb0
[ 2.111921] mbox_free_channel.part.2+0x24/0xb8
[ 2.116453] mbox_free_channel+0x18/0x28
This bug is present from the beginning of times.
Cc: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
---
drivers/mailbox/imx-mailbox.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
index 9f74dee1a58c..957c10c4e674 100644
--- a/drivers/mailbox/imx-mailbox.c
+++ b/drivers/mailbox/imx-mailbox.c
@@ -214,8 +214,10 @@ static void imx_mu_shutdown(struct mbox_chan *chan)
struct imx_mu_priv *priv = to_imx_mu_priv(chan->mbox);
struct imx_mu_con_priv *cp = chan->con_priv;
- if (cp->type == IMX_MU_TYPE_TXDB)
+ if (cp->type == IMX_MU_TYPE_TXDB) {
tasklet_kill(&cp->txdb_tasklet);
+ return;
+ }
imx_mu_xcr_rmw(priv, 0, IMX_MU_xCR_TIEn(cp->idx) |
IMX_MU_xCR_RIEn(cp->idx) | IMX_MU_xCR_GIEn(cp->idx));
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* RE: [EXT] Re: [PATCH v3] mailbox: imx: add support for imx v1 mu
2019-08-01 14:47 ` Daniel Baluta
@ 2019-08-02 3:24 ` Richard Zhu
0 siblings, 0 replies; 7+ messages in thread
From: Richard Zhu @ 2019-08-02 3:24 UTC (permalink / raw)
To: Daniel Baluta
Cc: jassisinghbrar, Oleksij Rempel, Aisheng Dong,
Linux Kernel Mailing List, linux-arm-kernel, dl-linux-imx
> -----Original Message-----
> From: Daniel Baluta <daniel.baluta@gmail.com>
> Sent: 2019年8月1日 22:47
> To: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: jassisinghbrar@gmail.com; Oleksij Rempel <o.rempel@pengutronix.de>;
> Aisheng Dong <aisheng.dong@nxp.com>; Linux Kernel Mailing List
> <linux-kernel@vger.kernel.org>; linux-arm-kernel
> <linux-arm-kernel@lists.infradead.org>; dl-linux-imx <linux-imx@nxp.com>
> Subject: [EXT] Re: [PATCH v3] mailbox: imx: add support for imx v1 mu
>
> Hi Richard,
>
> Thanks for the patch. Please always add linux-imx@nxp.com mailing list for imx
> related patches. I missed it.
>
[Richard Zhu] Okay, roger that.
> Few comments inline.
>
> Please also update in a separate patch attached to this series the devictree
> bindings doc Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> by adding description for mx7ulp-mu
>
> <snip>
[Richard Zhu] Okay, the binding doc would be added later.
>
> > There is a version1.0 MU on i.MX7ULP platform.
>
> space between version and 1.0
>
[Richard Zhu] Okay.
> > One new version ID register is added, and it's offset is 0.
> > TRn registers are defined at the offset 0x20 ~ 0x2C.
> > RRn registers are defined at the offset 0x40 ~ 0x4C.
> > SR/CR registers are defined at 0x60/0x64.
> > Extend this driver to support it.
>
> Do you have a little bit of history about MU versioning? So there was:
>
> * version 0.5 on i.MX6-es
> * version 1.0 on i.MX7ULP
>
> Next, is this 1.0 compatbile with i.MX8 right?
>
[Richard Zhu] Only i.MX7ULP has the version 1.0 MU.
i.MX8 has the same version MU that i.MX6-es have.
IMHO, I don't know why design team do it this way.
> Also, can you please rebase your patch on my 2 bugfixes attached?
[Richard Zhu] Okay, no problem. I would send the v4 version out later after rebase your 2 bugfixes patches.
>
> thanks,
> Daniel.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3] mailbox: imx: add support for imx v1 mu
2019-07-31 8:51 [PATCH v3] mailbox: imx: add support for imx v1 mu Richard Zhu
2019-08-01 14:47 ` Daniel Baluta
@ 2019-08-02 3:54 ` Daniel Baluta
2019-08-02 4:29 ` Oleksij Rempel
1 sibling, 1 reply; 7+ messages in thread
From: Daniel Baluta @ 2019-08-02 3:54 UTC (permalink / raw)
To: Richard Zhu
Cc: jassisinghbrar, Oleksij Rempel, Aisheng Dong,
Linux Kernel Mailing List, linux-arm-kernel
One more thing. See below:
On Wed, Jul 31, 2019 at 12:14 PM Richard Zhu <hongxing.zhu@nxp.com> wrote:
<snip>
> -/* Control Register */
> -#define IMX_MU_xCR 0x24
> /* General Purpose Interrupt Enable */
> #define IMX_MU_xCR_GIEn(x) BIT(28 + (3 - (x)))
> /* Receive Interrupt Enable */
> @@ -44,6 +36,13 @@ enum imx_mu_chan_type {
> IMX_MU_TYPE_RXDB, /* Rx doorbell */
> };
>
> +struct imx_mu_dcfg {
Can you rename this into imx_mu_regs ?
> + u32 xTR[4]; /* Transmit Registers */
> + u32 xRR[4]; /* Receive Registers */
> + u32 xSR; /* Status Register */
> + u32 xCR; /* Control Register */
> +};
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3] mailbox: imx: add support for imx v1 mu
2019-08-02 3:54 ` Daniel Baluta
@ 2019-08-02 4:29 ` Oleksij Rempel
0 siblings, 0 replies; 7+ messages in thread
From: Oleksij Rempel @ 2019-08-02 4:29 UTC (permalink / raw)
To: Daniel Baluta
Cc: Richard Zhu, jassisinghbrar, Aisheng Dong,
Linux Kernel Mailing List, linux-arm-kernel
On Fri, Aug 02, 2019 at 06:54:27AM +0300, Daniel Baluta wrote:
> One more thing. See below:
>
> On Wed, Jul 31, 2019 at 12:14 PM Richard Zhu <hongxing.zhu@nxp.com> wrote:
>
> <snip>
>
> > -/* Control Register */
> > -#define IMX_MU_xCR 0x24
> > /* General Purpose Interrupt Enable */
> > #define IMX_MU_xCR_GIEn(x) BIT(28 + (3 - (x)))
> > /* Receive Interrupt Enable */
> > @@ -44,6 +36,13 @@ enum imx_mu_chan_type {
> > IMX_MU_TYPE_RXDB, /* Rx doorbell */
> > };
> >
> > +struct imx_mu_dcfg {
>
> Can you rename this into imx_mu_regs ?
I decided not blame this part. Otherwise adding other type of quirks
will lead to more refactoring work.
> > + u32 xTR[4]; /* Transmit Registers */
> > + u32 xRR[4]; /* Receive Registers */
> > + u32 xSR; /* Status Register */
> > + u32 xCR; /* Control Register */
> > +};
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3] mailbox: imx: add support for imx v1 mu
@ 2019-07-30 5:12 Richard Zhu
2019-07-30 5:12 ` Richard Zhu
0 siblings, 1 reply; 7+ messages in thread
From: Richard Zhu @ 2019-07-30 5:12 UTC (permalink / raw)
To: jassisinghbrar, o.rempel, aisheng.dong
Cc: linux-kernel, linux-arm-kernel, Richard Zhu
Change logs:
v2 --> v3:
- Format the patch-set refer to Oleksij's guidance.
- Init the register array by a simple way recommended by Oleksij.
- Add Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> tag.
v1 --> v2:
- Use to have the register layout linked on probe, suggested by
Oleksij Rempel <o.rempel@pengutronix.de>.
- Add Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> tag.
Richard Zhu (1):
mailbox: imx: add support for imx v1 mu
drivers/mailbox/imx-mailbox.c | 55 ++++++++++++++++++++++++++++++-------------
1 file changed, 38 insertions(+), 17 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3] mailbox: imx: add support for imx v1 mu
2019-07-30 5:12 Richard Zhu
@ 2019-07-30 5:12 ` Richard Zhu
0 siblings, 0 replies; 7+ messages in thread
From: Richard Zhu @ 2019-07-30 5:12 UTC (permalink / raw)
To: jassisinghbrar, o.rempel, aisheng.dong
Cc: linux-kernel, linux-arm-kernel, Richard Zhu
There is a version1.0 MU on i.MX7ULP platform.
One new version ID register is added, and it's offset is 0.
TRn registers are defined at the offset 0x20 ~ 0x2C.
RRn registers are defined at the offset 0x40 ~ 0x4C.
SR/CR registers are defined at 0x60/0x64.
Extend this driver to support it.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Suggested-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
drivers/mailbox/imx-mailbox.c | 55 ++++++++++++++++++++++++++++++-------------
1 file changed, 38 insertions(+), 17 deletions(-)
diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
index 25be8bb..c81be1c 100644
--- a/drivers/mailbox/imx-mailbox.c
+++ b/drivers/mailbox/imx-mailbox.c
@@ -12,19 +12,11 @@
#include <linux/of_device.h>
#include <linux/slab.h>
-/* Transmit Register */
-#define IMX_MU_xTRn(x) (0x00 + 4 * (x))
-/* Receive Register */
-#define IMX_MU_xRRn(x) (0x10 + 4 * (x))
-/* Status Register */
-#define IMX_MU_xSR 0x20
#define IMX_MU_xSR_GIPn(x) BIT(28 + (3 - (x)))
#define IMX_MU_xSR_RFn(x) BIT(24 + (3 - (x)))
#define IMX_MU_xSR_TEn(x) BIT(20 + (3 - (x)))
#define IMX_MU_xSR_BRDIP BIT(9)
-/* Control Register */
-#define IMX_MU_xCR 0x24
/* General Purpose Interrupt Enable */
#define IMX_MU_xCR_GIEn(x) BIT(28 + (3 - (x)))
/* Receive Interrupt Enable */
@@ -44,6 +36,13 @@ enum imx_mu_chan_type {
IMX_MU_TYPE_RXDB, /* Rx doorbell */
};
+struct imx_mu_dcfg {
+ u32 xTR[4]; /* Transmit Registers */
+ u32 xRR[4]; /* Receive Registers */
+ u32 xSR; /* Status Register */
+ u32 xCR; /* Control Register */
+};
+
struct imx_mu_con_priv {
unsigned int idx;
char irq_desc[IMX_MU_CHAN_NAME_SIZE];
@@ -61,12 +60,27 @@ struct imx_mu_priv {
struct mbox_chan mbox_chans[IMX_MU_CHANS];
struct imx_mu_con_priv con_priv[IMX_MU_CHANS];
+ const struct imx_mu_dcfg *dcfg;
struct clk *clk;
int irq;
bool side_b;
};
+static const struct imx_mu_dcfg imx_mu_cfg_imx6sx = {
+ .xTR = {0x0, 0x4, 0x8, 0xc},
+ .xRR = {0x10, 0x14, 0x18, 0x1c},
+ .xSR = 0x20,
+ .xCR = 0x24,
+};
+
+static const struct imx_mu_dcfg imx_mu_cfg_imx7ulp = {
+ .xTR = {0x20, 0x24, 0x28, 0x2c},
+ .xRR = {0x40, 0x44, 0x48, 0x4c},
+ .xSR = 0x60,
+ .xCR = 0x64,
+};
+
static struct imx_mu_priv *to_imx_mu_priv(struct mbox_controller *mbox)
{
return container_of(mbox, struct imx_mu_priv, mbox);
@@ -88,10 +102,10 @@ static u32 imx_mu_xcr_rmw(struct imx_mu_priv *priv, u32 set, u32 clr)
u32 val;
spin_lock_irqsave(&priv->xcr_lock, flags);
- val = imx_mu_read(priv, IMX_MU_xCR);
+ val = imx_mu_read(priv, priv->dcfg->xCR);
val &= ~clr;
val |= set;
- imx_mu_write(priv, val, IMX_MU_xCR);
+ imx_mu_write(priv, val, priv->dcfg->xCR);
spin_unlock_irqrestore(&priv->xcr_lock, flags);
return val;
@@ -111,8 +125,8 @@ static irqreturn_t imx_mu_isr(int irq, void *p)
struct imx_mu_con_priv *cp = chan->con_priv;
u32 val, ctrl, dat;
- ctrl = imx_mu_read(priv, IMX_MU_xCR);
- val = imx_mu_read(priv, IMX_MU_xSR);
+ ctrl = imx_mu_read(priv, priv->dcfg->xCR);
+ val = imx_mu_read(priv, priv->dcfg->xSR);
switch (cp->type) {
case IMX_MU_TYPE_TX:
@@ -138,10 +152,10 @@ static irqreturn_t imx_mu_isr(int irq, void *p)
imx_mu_xcr_rmw(priv, 0, IMX_MU_xCR_TIEn(cp->idx));
mbox_chan_txdone(chan, 0);
} else if (val == IMX_MU_xSR_RFn(cp->idx)) {
- dat = imx_mu_read(priv, IMX_MU_xRRn(cp->idx));
+ dat = imx_mu_read(priv, priv->dcfg->xRR[cp->idx]);
mbox_chan_received_data(chan, (void *)&dat);
} else if (val == IMX_MU_xSR_GIPn(cp->idx)) {
- imx_mu_write(priv, IMX_MU_xSR_GIPn(cp->idx), IMX_MU_xSR);
+ imx_mu_write(priv, IMX_MU_xSR_GIPn(cp->idx), priv->dcfg->xSR);
mbox_chan_received_data(chan, NULL);
} else {
dev_warn_ratelimited(priv->dev, "Not handled interrupt\n");
@@ -159,7 +173,7 @@ static int imx_mu_send_data(struct mbox_chan *chan, void *data)
switch (cp->type) {
case IMX_MU_TYPE_TX:
- imx_mu_write(priv, *arg, IMX_MU_xTRn(cp->idx));
+ imx_mu_write(priv, *arg, priv->dcfg->xTR[cp->idx]);
imx_mu_xcr_rmw(priv, IMX_MU_xCR_TIEn(cp->idx), 0);
break;
case IMX_MU_TYPE_TXDB:
@@ -257,7 +271,7 @@ static void imx_mu_init_generic(struct imx_mu_priv *priv)
return;
/* Set default MU configuration */
- imx_mu_write(priv, 0, IMX_MU_xCR);
+ imx_mu_write(priv, 0, priv->dcfg->xCR);
}
static int imx_mu_probe(struct platform_device *pdev)
@@ -265,6 +279,7 @@ static int imx_mu_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
struct imx_mu_priv *priv;
+ const struct imx_mu_dcfg *dcfg;
unsigned int i;
int ret;
@@ -282,6 +297,11 @@ static int imx_mu_probe(struct platform_device *pdev)
if (priv->irq < 0)
return priv->irq;
+ dcfg = of_device_get_match_data(dev);
+ if (!dcfg)
+ return -EINVAL;
+ priv->dcfg = dcfg;
+
priv->clk = devm_clk_get(dev, NULL);
if (IS_ERR(priv->clk)) {
if (PTR_ERR(priv->clk) != -ENOENT)
@@ -335,7 +355,8 @@ static int imx_mu_remove(struct platform_device *pdev)
}
static const struct of_device_id imx_mu_dt_ids[] = {
- { .compatible = "fsl,imx6sx-mu" },
+ { .compatible = "fsl,imx7ulp-mu", .data = &imx_mu_cfg_imx7ulp },
+ { .compatible = "fsl,imx6sx-mu", .data = &imx_mu_cfg_imx6sx },
{ },
};
MODULE_DEVICE_TABLE(of, imx_mu_dt_ids);
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-08-02 4:29 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-07-31 8:51 [PATCH v3] mailbox: imx: add support for imx v1 mu Richard Zhu
2019-08-01 14:47 ` Daniel Baluta
2019-08-02 3:24 ` [EXT] " Richard Zhu
2019-08-02 3:54 ` Daniel Baluta
2019-08-02 4:29 ` Oleksij Rempel
-- strict thread matches above, loose matches on Subject: below --
2019-07-30 5:12 Richard Zhu
2019-07-30 5:12 ` Richard Zhu
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