From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD4D9C433FF for ; Fri, 2 Aug 2019 13:34:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B437120665 for ; Fri, 2 Aug 2019 13:34:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1564752852; bh=cHHC/6BH3hEEaUaPDgk9Foc2zUvFdzdsqjlgF27ogsA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=XvTgrcCZjlVsBWNx8OLk+eLxhL7kuWdG4WD1URHB7ZuCl91MBIAuNFyj2mRo2iz6e xf6vj6Otl+Jsn0e3eVzkOa+G4KpLABlzqx5fVBti/2ZgNCikZ2rs56XMW9W0PKPu/l 03nnezw7cGRmkHwp7upQseq8C4BEfn89nf3R6QLs= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2405736AbfHBNeL (ORCPT ); Fri, 2 Aug 2019 09:34:11 -0400 Received: from mail.kernel.org ([198.145.29.99]:33270 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2393853AbfHBNWt (ORCPT ); Fri, 2 Aug 2019 09:22:49 -0400 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3D6852186A; Fri, 2 Aug 2019 13:22:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1564752168; bh=cHHC/6BH3hEEaUaPDgk9Foc2zUvFdzdsqjlgF27ogsA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=a3KPZIm/BSgeqDMibegzfxOkDWu+PSbBj7JelTJ0sfJRlQg2znxWPPwHEeftXkmkW HGJw0TvAJrzW4kk2lA2BD28algk4ROe4r0wlmcbHvOdNnP1AtAywlH2oe0I7626gKi z19vFz1JhDfH1WnNnwEB/xovydzLhlyxVyDyaAZU= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Zhenzhong Duan , Peter Zijlstra , Alexander Shishkin , Arnaldo Carvalho de Melo , Boris Ostrovsky , Borislav Petkov , Jiri Olsa , Juergen Gross , Linus Torvalds , Namhyung Kim , Thomas Gleixner , Ingo Molnar , Sasha Levin Subject: [PATCH AUTOSEL 5.2 73/76] perf/x86: Apply more accurate check on hypervisor platform Date: Fri, 2 Aug 2019 09:19:47 -0400 Message-Id: <20190802131951.11600-73-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190802131951.11600-1-sashal@kernel.org> References: <20190802131951.11600-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Zhenzhong Duan [ Upstream commit 5ea3f6fb37b79da33ac9211df336fd2b9f47c39f ] check_msr is used to fix a bug report in guest where KVM doesn't support LBR MSR and cause #GP. The msr check is bypassed on real HW to workaround a false failure, see commit d0e1a507bdc7 ("perf/x86/intel: Disable check_msr for real HW") When running a guest with CONFIG_HYPERVISOR_GUEST not set or "nopv" enabled, current check isn't enough and #GP could trigger. Signed-off-by: Zhenzhong Duan Signed-off-by: Peter Zijlstra (Intel) Cc: Alexander Shishkin Cc: Arnaldo Carvalho de Melo Cc: Boris Ostrovsky Cc: Borislav Petkov Cc: Jiri Olsa Cc: Juergen Gross Cc: Linus Torvalds Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Thomas Gleixner Link: https://lkml.kernel.org/r/1564022366-18293-1-git-send-email-zhenzhong.duan@oracle.com Signed-off-by: Ingo Molnar Signed-off-by: Sasha Levin --- arch/x86/events/intel/core.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index e9042e3f3052c..6179be624f357 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -20,7 +20,6 @@ #include #include #include -#include #include "../perf_event.h" @@ -4057,7 +4056,7 @@ static bool check_msr(unsigned long msr, u64 mask) * Disable the check for real HW, so we don't * mess with potentionaly enabled registers: */ - if (hypervisor_is_type(X86_HYPER_NATIVE)) + if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) return true; /* -- 2.20.1