From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F1F3C433FF for ; Tue, 6 Aug 2019 08:52:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 30337208C3 for ; Tue, 6 Aug 2019 08:52:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732448AbfHFIwH (ORCPT ); Tue, 6 Aug 2019 04:52:07 -0400 Received: from inva020.nxp.com ([92.121.34.13]:38536 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731835AbfHFIwF (ORCPT ); Tue, 6 Aug 2019 04:52:05 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id AAD2D1A0279; Tue, 6 Aug 2019 10:52:03 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 4581C1A01DB; Tue, 6 Aug 2019 10:51:59 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 88A0C402DD; Tue, 6 Aug 2019 16:51:53 +0800 (SGT) From: Chuanhua Han To: shawnguo@kernel.org, leoyang.li@nxp.com, robh+dt@kernel.org, mark.rutland@arm.com Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chuanhua Han Subject: [PATCH 2/4] arm64: dts: ls1012a: Fix incorrect I2C clock divider Date: Tue, 6 Aug 2019 16:42:21 +0800 Message-Id: <20190806084223.23543-2-chuanhua.han@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190806084223.23543-1-chuanhua.han@nxp.com> References: <20190806084223.23543-1-chuanhua.han@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Ls1012a platform, the i2c input clock is actually platform pll CLK / 4 (this is the hardware connection), other clock divider can not get the correct i2c clock, resulting in the output of SCL pin clock is not accurate. Signed-off-by: Chuanhua Han --- arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index ec6257a..124a7e2 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -323,7 +323,7 @@ #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 0>; + clocks = <&clockgen 4 3>; status = "disabled"; }; @@ -333,7 +333,7 @@ #size-cells = <0>; reg = <0x0 0x2190000 0x0 0x10000>; interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 0>; + clocks = <&clockgen 4 3>; status = "disabled"; }; -- 2.9.5