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From: Christoph Hellwig <hch@infradead.org>
To: Alexandre Ghiti <alex@ghiti.fr>
Cc: Christoph Hellwig <hch@infradead.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv: kbuild: add virtual memory system selection
Date: Wed, 7 Aug 2019 08:12:30 -0700	[thread overview]
Message-ID: <20190807151229.GA16432@infradead.org> (raw)
In-Reply-To: <c331e389-5f33-634a-f62f-e48251ca4cfe@ghiti.fr>

On Wed, Aug 07, 2019 at 09:04:40AM +0200, Alexandre Ghiti wrote:
> I took a look at how x86 deals with 5-level page table: it allows to handle
> 5-level and 4-level at runtime by folding the last page table level (cf
> Documentation/x86/x86_64/5level-paging.rst). So we might want to be able to
> do the same and deal with that at runtime.

Yes, following the X86_5LEVEL model is the right thing.

  reply	other threads:[~2019-08-07 15:12 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-26 20:00 Paul Walmsley
2019-07-28 13:38 ` Bin Meng
2019-07-31 19:37   ` Paul Walmsley
2019-08-01  8:56     ` Bin Meng
2019-08-02  8:44 ` Christoph Hellwig
2019-08-07  0:02   ` Paul Walmsley
2019-08-07  5:42     ` Christoph Hellwig
2019-08-07  7:04       ` Alexandre Ghiti
2019-08-07 15:12         ` Christoph Hellwig [this message]
2019-08-07 16:20           ` Palmer Dabbelt
2019-08-07 16:42         ` Paul Walmsley

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