From: Andrew Murray <andrew.murray@arm.com>
To: "Z.q. Hou" <zhiqiang.hou@nxp.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
Leo Li <leoyang.li@nxp.com>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
"M.h. Lian" <minghuan.lian@nxp.com>
Subject: Re: [PATCH 4/4] arm64: dts: fsl: Remove num-lanes property from PCIe nodes
Date: Mon, 12 Aug 2019 09:35:46 +0100 [thread overview]
Message-ID: <20190812083545.GV56241@e119886-lin.cambridge.arm.com> (raw)
In-Reply-To: <20190812042435.25102-5-Zhiqiang.Hou@nxp.com>
On Mon, Aug 12, 2019 at 04:22:33AM +0000, Z.q. Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> On FSL Layerscape SoCs, the number of lanes assigned to PCIe
> controller is not fixed, it is determined by the selected
> SerDes protocol in the RCW (Reset Configuration Word), and
> the PCIe link training is completed automatically base on
> the selected SerDes protocol, and the link width set-up is
> updated by hardware. So the num-lanes is not needed to
> specify the link width.
>
> The current num-lanes indicates the max lanes PCIe controller
> can support up to, instead of the lanes assigned to the PCIe
> controller. This can result in PCIe link training fail after
> hot-reset. So remove the num-lanes to avoid set-up to incorrect
> link width.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 1 -
> arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 3 ---
> arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 6 ------
> arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 3 ---
> arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 4 ----
> 5 files changed, 17 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> index ec6257a5b251..119c597ca867 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> @@ -486,7 +486,6 @@
> #address-cells = <3>;
> #size-cells = <2>;
> device_type = "pci";
> - num-lanes = <4>;
> num-viewport = <2>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> index 71d9ed9ff985..c084c7a4b6a6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> @@ -677,7 +677,6 @@
> #size-cells = <2>;
> device_type = "pci";
> dma-coherent;
> - num-lanes = <4>;
> num-viewport = <6>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
> @@ -704,7 +703,6 @@
> #size-cells = <2>;
> device_type = "pci";
> dma-coherent;
> - num-lanes = <2>;
> num-viewport = <6>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
> @@ -731,7 +729,6 @@
> #size-cells = <2>;
> device_type = "pci";
> dma-coherent;
> - num-lanes = <2>;
> num-viewport = <6>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> index b0ef08b090dd..d4c1da3d4bde 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> @@ -649,7 +649,6 @@
> #size-cells = <2>;
> device_type = "pci";
> dma-coherent;
> - num-lanes = <4>;
> num-viewport = <8>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
> @@ -671,7 +670,6 @@
> reg-names = "regs", "addr_space";
> num-ib-windows = <6>;
> num-ob-windows = <8>;
> - num-lanes = <2>;
> status = "disabled";
> };
>
> @@ -687,7 +685,6 @@
> #size-cells = <2>;
> device_type = "pci";
> dma-coherent;
> - num-lanes = <2>;
> num-viewport = <8>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
> @@ -709,7 +706,6 @@
> reg-names = "regs", "addr_space";
> num-ib-windows = <6>;
> num-ob-windows = <8>;
> - num-lanes = <2>;
> status = "disabled";
> };
>
> @@ -725,7 +721,6 @@
> #size-cells = <2>;
> device_type = "pci";
> dma-coherent;
> - num-lanes = <2>;
> num-viewport = <8>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
> @@ -747,7 +742,6 @@
> reg-names = "regs", "addr_space";
> num-ib-windows = <6>;
> num-ob-windows = <8>;
> - num-lanes = <2>;
> status = "disabled";
> };
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> index dfbead405783..76c87afeba1e 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> @@ -456,7 +456,6 @@
> #size-cells = <2>;
> device_type = "pci";
> dma-coherent;
> - num-lanes = <4>;
> num-viewport = <256>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 /* downstream I/O */
> @@ -482,7 +481,6 @@
> #size-cells = <2>;
> device_type = "pci";
> dma-coherent;
> - num-lanes = <4>;
> num-viewport = <6>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 /* downstream I/O */
> @@ -508,7 +506,6 @@
> #size-cells = <2>;
> device_type = "pci";
> dma-coherent;
> - num-lanes = <8>;
> num-viewport = <6>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 /* downstream I/O */
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
> index 64101c9962ce..7a0be8eaa84a 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
> @@ -639,7 +639,6 @@
> #size-cells = <2>;
> device_type = "pci";
> dma-coherent;
> - num-lanes = <4>;
> num-viewport = <6>;
> bus-range = <0x0 0xff>;
> msi-parent = <&its>;
> @@ -661,7 +660,6 @@
> #size-cells = <2>;
> device_type = "pci";
> dma-coherent;
> - num-lanes = <4>;
> num-viewport = <6>;
> bus-range = <0x0 0xff>;
> msi-parent = <&its>;
> @@ -683,7 +681,6 @@
> #size-cells = <2>;
> device_type = "pci";
> dma-coherent;
> - num-lanes = <8>;
> num-viewport = <256>;
> bus-range = <0x0 0xff>;
> msi-parent = <&its>;
> @@ -705,7 +702,6 @@
> #size-cells = <2>;
> device_type = "pci";
> dma-coherent;
> - num-lanes = <4>;
> num-viewport = <6>;
> bus-range = <0x0 0xff>;
> msi-parent = <&its>;
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
> --
> 2.17.1
>
next prev parent reply other threads:[~2019-08-12 8:35 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-12 4:22 [PATCH 0/4] Layerscape: Remove num-lanes property from PCIe nodes Z.q. Hou
2019-08-12 4:22 ` [PATCH 1/4] dt-bingings: PCI: Remove the num-lanes from Required properties Z.q. Hou
2019-08-12 8:45 ` Andrew Murray
2019-08-13 3:07 ` Z.q. Hou
2019-08-13 4:35 ` Kishon Vijay Abraham I
2019-08-19 19:20 ` Bjorn Helgaas
2019-08-19 23:57 ` Z.q. Hou
2019-08-12 4:22 ` [PATCH 2/4] PCI: dwc: Return directly when num-lanes is not found Z.q. Hou
2019-08-12 8:34 ` Andrew Murray
2019-08-13 3:13 ` Z.q. Hou
2019-08-12 4:22 ` [PATCH 3/4] ARM: dts: ls1021a: Remove num-lanes property from PCIe nodes Z.q. Hou
2019-08-12 8:35 ` Andrew Murray
2019-08-13 3:13 ` Z.q. Hou
2019-08-19 19:24 ` Bjorn Helgaas
2019-08-20 0:12 ` Z.q. Hou
2019-08-12 4:22 ` [PATCH 4/4] arm64: dts: fsl: " Z.q. Hou
2019-08-12 8:35 ` Andrew Murray [this message]
2019-08-13 3:14 ` Z.q. Hou
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