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* [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS
@ 2019-08-14 12:49 Vinod Koul
  2019-08-14 12:49 ` [PATCH 01/22] arm64: dts: qcom: sm8150: add base dts file Vinod Koul
                   ` (21 more replies)
  0 siblings, 22 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:49 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

This series adds DTS for SM8150, PMIC PM8150, PM8150B, PM8150L and the MTP
for SM815.

Only dependency for this series is the clk gcc dt binding [1] which is
already in Clock tree upstream, so merging that is required.

The patches are incremental based on features as they were developed. We can
merge them into bigger commits but I feel keeping them as individual units
helps.

[1]: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git/commit/?h=clk-qcom&id=e5ee331ebcf33827d1bd64e984c565b23cf53227

Sibi Sankar (3):
  arm64: dts: qcom: sm8150: Add pmu node to SM8150 SoC
  arm64: dts: qcom: sm8150: Add SMEM nodes
  arm64: dts: qcom: sm8150: Add APSS shared mailbox

Vinod Koul (19):
  arm64: dts: qcom: sm8150: add base dts file
  arm64: dts: qcom: sm8150-mtp: add base dts file
  arm64: dts: qcom: sm8150: add tlmm node
  arm64: dts: qcom: sm8150-mtp: add tlmm reserved range
  arm64: dts: qcom: sm8150: Add spmi node
  arm64: dts: qcom: pm8150: Add Base DTS file
  arm64: dts: qcom: pm8150: Add pon and rtc nodes
  arm64: dts: qcom: pm8150: Add vadc node
  arm64: dts: qcom: pm8150b: Add Base DTS file
  arm64: dts: qcom: pm8150b: Add pon and adc nodes
  arm64: dts: qcom: pm8150b: Add gpio node
  arm64: dts: qcom: pm8150l: Add Base DTS file
  arm64: dts: qcom: pm8150l: Add pon and adc nodes
  arm64: dts: qcom: pm8150l: Add gpio node
  arm64: dts: qcom: sm8150-mtp: Include pmics
  arm64: dts: qcom: sm8150-mtp: Add resin node
  arm64: dts: qcom: sm8150: Add apss_shared and apps_rsc nodes
  arm64: dts: qcom: sm8150: Add reserved-memory regions
  arm64: dts: qcom: sm8150-mtp: Add regulators

 arch/arm64/boot/dts/qcom/Makefile       |   1 +
 arch/arm64/boot/dts/qcom/pm8150.dtsi    |  89 +++++
 arch/arm64/boot/dts/qcom/pm8150b.dtsi   |  95 +++++
 arch/arm64/boot/dts/qcom/pm8150l.dtsi   |  74 ++++
 arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 371 ++++++++++++++++++
 arch/arm64/boot/dts/qcom/sm8150.dtsi    | 476 ++++++++++++++++++++++++
 6 files changed, 1106 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pm8150.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/pm8150b.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/pm8150l.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/sm8150-mtp.dts
 create mode 100644 arch/arm64/boot/dts/qcom/sm8150.dtsi

-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 01/22] arm64: dts: qcom: sm8150: add base dts file
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
@ 2019-08-14 12:49 ` Vinod Koul
  2019-08-14 16:58   ` Stephen Boyd
  2019-08-14 17:50   ` Bjorn Andersson
  2019-08-14 12:49 ` [PATCH 02/22] arm64: dts: qcom: sm8150-mtp: " Vinod Koul
                   ` (20 subsequent siblings)
  21 siblings, 2 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:49 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

This add base DTS file with cpu, psci, firmware and clock node
to enable boot to console

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 269 +++++++++++++++++++++++++++
 1 file changed, 269 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sm8150.dtsi

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
new file mode 100644
index 000000000000..cd9fcadaeacb
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -0,0 +1,269 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+// Copyright (c) 2019, Linaro Limited
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/qcom,gcc-sm8150.h>
+
+/ {
+	interrupt-parent = <&intc>;
+
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	chosen { };
+
+	clocks {
+		xo_board: xo-board {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <19200000>;
+			clock-output-names = "xo_board";
+		};
+
+		sleep_clk: sleep-clk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <32764>;
+			clock-output-names = "sleep_clk";
+		};
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		CPU0: cpu@0 {
+			device_type = "cpu";
+			compatible = "qcom,kryo485";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+			next-level-cache = <&L2_0>;
+			L2_0: l2-cache {
+				compatible = "cache";
+				next-level-cache = <&L3_0>;
+				L3_0: l3-cache {
+				      compatible = "cache";
+				};
+			};
+		};
+
+		CPU1: cpu@100 {
+			device_type = "cpu";
+			compatible = "qcom,kryo485";
+			reg = <0x0 0x100>;
+			enable-method = "psci";
+			next-level-cache = <&L2_100>;
+			L2_100: l2-cache {
+				compatible = "cache";
+				next-level-cache = <&L3_0>;
+			};
+
+		};
+
+		CPU2: cpu@200 {
+			device_type = "cpu";
+			compatible = "qcom,kryo485";
+			reg = <0x0 0x200>;
+			enable-method = "psci";
+			next-level-cache = <&L2_200>;
+			L2_200: l2-cache {
+				compatible = "cache";
+				next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU3: cpu@300 {
+			device_type = "cpu";
+			compatible = "qcom,kryo485";
+			reg = <0x0 0x300>;
+			enable-method = "psci";
+			next-level-cache = <&L2_300>;
+			L2_300: l2-cache {
+				compatible = "cache";
+				next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU4: cpu@400 {
+			device_type = "cpu";
+			compatible = "qcom,kryo485";
+			reg = <0x0 0x400>;
+			enable-method = "psci";
+			next-level-cache = <&L2_400>;
+			L2_400: l2-cache {
+				compatible = "cache";
+				next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU5: cpu@500 {
+			device_type = "cpu";
+			compatible = "qcom,kryo485";
+			reg = <0x0 0x500>;
+			enable-method = "psci";
+			next-level-cache = <&L2_500>;
+			L2_500: l2-cache {
+				compatible = "cache";
+				next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU6: cpu@600 {
+			device_type = "cpu";
+			compatible = "qcom,kryo485";
+			reg = <0x0 0x600>;
+			enable-method = "psci";
+			next-level-cache = <&L2_600>;
+			L2_600: l2-cache {
+				compatible = "cache";
+				next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU7: cpu@700 {
+			device_type = "cpu";
+			compatible = "qcom,kryo485";
+			reg = <0x0 0x700>;
+			enable-method = "psci";
+			next-level-cache = <&L2_700>;
+			L2_700: l2-cache {
+				compatible = "cache";
+				next-level-cache = <&L3_0>;
+			};
+		};
+	};
+
+	firmware {
+		scm: scm {
+			compatible = "qcom,scm-sm8150", "qcom,scm";
+			#reset-cells = <1>;
+		};
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		/* We expect the bootloader to fill in the size */
+		reg = <0 0x80000000 0 0>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	soc: soc@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+		compatible = "simple-bus";
+
+		gcc: clock-controller@100000 {
+			compatible = "qcom,gcc-sm8150";
+			reg = <0x00100000 0x1f0000>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			#power-domain-cells = <1>;
+			clock-names = "bi_tcxo", "sleep_clk";
+			clocks = <&xo_board>, <&sleep_clk>;
+		};
+
+		qupv3_id_1: geniqup@ac0000 {
+			compatible = "qcom,geni-se-qup";
+			reg = <0x00ac0000 0x6000>;
+			clock-names = "m-ahb", "s-ahb";
+			clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
+				 <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+			status = "disabled";
+
+			uart2: serial@a90000 {
+				compatible = "qcom,geni-debug-uart";
+				reg = <0x00a90000 0x4000>;
+				clock-names = "se";
+				clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
+				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+		};
+
+		intc: interrupt-controller@17a00000 {
+			compatible = "arm,gic-v3";
+			interrupt-controller;
+			#interrupt-cells = <3>;
+			reg = <0x17a00000 0x10000>,	/* GICD */
+			      <0x17a60000 0x100000>;	/* GICR * 8 */
+			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		timer@17c20000 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+			compatible = "arm,armv7-timer-mem";
+			reg = <0x17c20000 0x1000>;
+			clock-frequency = <19200000>;
+
+			frame@17c21000{
+				frame-number = <0>;
+				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+				reg = <0x17c21000 0x1000>,
+				      <0x17c22000 0x1000>;
+			};
+
+			frame@17c23000 {
+				frame-number = <1>;
+				interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+				reg = <0x17c23000 0x1000>;
+				status = "disabled";
+			};
+
+			frame@17c25000 {
+				frame-number = <2>;
+				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+				reg = <0x17c25000 0x1000>;
+				status = "disabled";
+			};
+
+			frame@17c27000 {
+				frame-number = <3>;
+				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+				reg = <0x17c26000 0x1000>;
+				status = "disabled";
+			};
+
+			frame@17c29000 {
+				frame-number = <4>;
+				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+				reg = <0x17c29000 0x1000>;
+				status = "disabled";
+			};
+
+			frame@17c2b000 {
+				frame-number = <5>;
+				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+				reg = <0x17c2b000 0x1000>;
+				status = "disabled";
+			};
+
+			frame@17c2d000 {
+				frame-number = <6>;
+				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+				reg = <0x17c2d000 0x1000>;
+				status = "disabled";
+			};
+		};
+
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
+	};
+};
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 02/22] arm64: dts: qcom: sm8150-mtp: add base dts file
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
  2019-08-14 12:49 ` [PATCH 01/22] arm64: dts: qcom: sm8150: add base dts file Vinod Koul
@ 2019-08-14 12:49 ` " Vinod Koul
  2019-08-14 17:53   ` Bjorn Andersson
  2019-08-14 12:49 ` [PATCH 03/22] arm64: dts: qcom: sm8150: add tlmm node Vinod Koul
                   ` (19 subsequent siblings)
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:49 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

This add base DTS file for sm8150-mtp and enables
boot to console

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/Makefile       |  1 +
 arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 28 +++++++++++++++++++++++++
 2 files changed, 29 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sm8150-mtp.dts

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 0a7e5dfce6f7..1964dacaf19b 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -12,5 +12,6 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-cheza-r2.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-cheza-r3.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-db845c.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-mtp.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-mtp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
diff --git a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
new file mode 100644
index 000000000000..df08ee50510d
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+// Copyright (c) 2019, Linaro Limited
+
+/dts-v1/;
+
+#include "sm8150.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. SM8150 MTP";
+	compatible = "qcom,sm8150-mtp";
+
+	aliases {
+		serial0 = &uart2;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&qupv3_id_1 {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 03/22] arm64: dts: qcom: sm8150: add tlmm node
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
  2019-08-14 12:49 ` [PATCH 01/22] arm64: dts: qcom: sm8150: add base dts file Vinod Koul
  2019-08-14 12:49 ` [PATCH 02/22] arm64: dts: qcom: sm8150-mtp: " Vinod Koul
@ 2019-08-14 12:49 ` Vinod Koul
  2019-08-14 17:01   ` Stephen Boyd
  2019-08-14 12:49 ` [PATCH 04/22] arm64: dts: qcom: sm8150-mtp: add tlmm reserved range Vinod Koul
                   ` (18 subsequent siblings)
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:49 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index cd9fcadaeacb..5f2f21270e2d 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -189,6 +189,21 @@
 			};
 		};
 
+		tlmm: pinctrl@3100000 {
+			compatible = "qcom,sm8150-pinctrl";
+			reg = <0x03100000 0x300000>,
+			      <0x03500000 0x300000>,
+			      <0x03900000 0x300000>,
+			      <0x03D00000 0x300000>;
+			reg-names = "west", "east", "north", "south";
+			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+			gpio-ranges = <&tlmm 0 0 175>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
 		intc: interrupt-controller@17a00000 {
 			compatible = "arm,gic-v3";
 			interrupt-controller;
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 04/22] arm64: dts: qcom: sm8150-mtp: add tlmm reserved range
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (2 preceding siblings ...)
  2019-08-14 12:49 ` [PATCH 03/22] arm64: dts: qcom: sm8150: add tlmm node Vinod Koul
@ 2019-08-14 12:49 ` Vinod Koul
  2019-08-14 17:01   ` Stephen Boyd
  2019-08-14 12:49 ` [PATCH 05/22] arm64: dts: qcom: sm8150: Add spmi node Vinod Koul
                   ` (17 subsequent siblings)
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:49 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
index df08ee50510d..8700f015c074 100644
--- a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
@@ -23,6 +23,10 @@
 	status = "okay";
 };
 
+&tlmm {
+	gpio-reserved-ranges = <0 4>, <126 4>;
+};
+
 &uart2 {
 	status = "okay";
 };
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 05/22] arm64: dts: qcom: sm8150: Add spmi node
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (3 preceding siblings ...)
  2019-08-14 12:49 ` [PATCH 04/22] arm64: dts: qcom: sm8150-mtp: add tlmm reserved range Vinod Koul
@ 2019-08-14 12:49 ` Vinod Koul
  2019-08-14 17:01   ` Stephen Boyd
  2019-08-14 12:49 ` [PATCH 06/22] arm64: dts: qcom: pm8150: Add Base DTS file Vinod Koul
                   ` (16 subsequent siblings)
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:49 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

Add SPMI node which is used for spmi_bus

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 5f2f21270e2d..5c6b103b042b 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -272,6 +272,24 @@
 			};
 		};
 
+		spmi_bus: spmi@c440000 {
+			compatible = "qcom,spmi-pmic-arb";
+			reg = <0x0c440000 0x0001100>,
+			      <0x0c600000 0x2000000>,
+			      <0x0e600000 0x0100000>,
+			      <0x0e700000 0x00a0000>,
+			      <0x0c40a000 0x0026000>;
+			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+			interrupt-names = "periph_irq";
+			interrupts = <GIC_SPI 481 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,ee = <0>;
+			qcom,channel = <0>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			interrupt-controller;
+			#interrupt-cells = <4>;
+			cell-index = <0>;
+		};
 	};
 
 	timer {
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 06/22] arm64: dts: qcom: pm8150: Add Base DTS file
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (4 preceding siblings ...)
  2019-08-14 12:49 ` [PATCH 05/22] arm64: dts: qcom: sm8150: Add spmi node Vinod Koul
@ 2019-08-14 12:49 ` Vinod Koul
  2019-08-14 17:03   ` Stephen Boyd
  2019-08-14 12:49 ` [PATCH 07/22] arm64: dts: qcom: pm8150: Add pon and rtc nodes Vinod Koul
                   ` (15 subsequent siblings)
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:49 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

Add base DTS file for pm8150 along with GPIOs

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/pm8150.dtsi | 41 ++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pm8150.dtsi

diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi
new file mode 100644
index 000000000000..b533e254a203
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+// Copyright (c) 2019, Linaro Limited
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+	pm8150_0: pm8150@0 {
+		compatible = "qcom,spmi-pmic";
+		reg = <0x0 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pm8150_gpios: gpio@c000 {
+			compatible = "qcom,pm8150-gpio";
+			reg = <0xc000>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
+				     <0 0xc1 0 IRQ_TYPE_NONE>,
+				     <0 0xc2 0 IRQ_TYPE_NONE>,
+				     <0 0xc3 0 IRQ_TYPE_NONE>,
+				     <0 0xc4 0 IRQ_TYPE_NONE>,
+				     <0 0xc5 0 IRQ_TYPE_NONE>,
+				     <0 0xc6 0 IRQ_TYPE_NONE>,
+				     <0 0xc7 0 IRQ_TYPE_NONE>,
+				     <0 0xc8 0 IRQ_TYPE_NONE>,
+				     <0 0xc9 0 IRQ_TYPE_NONE>,
+				     <0 0xca 0 IRQ_TYPE_NONE>,
+				     <0 0xcb 0 IRQ_TYPE_NONE>;
+		};
+	};
+
+	qcom,pm8150@1 {
+		compatible ="qcom,spmi-pmic";
+		reg = <0x1 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+};
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 07/22] arm64: dts: qcom: pm8150: Add pon and rtc nodes
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (5 preceding siblings ...)
  2019-08-14 12:49 ` [PATCH 06/22] arm64: dts: qcom: pm8150: Add Base DTS file Vinod Koul
@ 2019-08-14 12:49 ` Vinod Koul
  2019-08-14 17:03   ` Stephen Boyd
  2019-08-14 12:49 ` [PATCH 08/22] arm64: dts: qcom: pm8150: Add vadc node Vinod Koul
                   ` (14 subsequent siblings)
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:49 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

PM8150 PMIC contains pon and rtc devices so add nodes for these.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/pm8150.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi
index b533e254a203..2cb727ce30eb 100644
--- a/arch/arm64/boot/dts/qcom/pm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi
@@ -2,6 +2,7 @@
 // Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
 // Copyright (c) 2019, Linaro Limited
 
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/spmi/spmi.h>
 
@@ -12,6 +13,25 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
+		pon: pon@800 {
+			compatible = "qcom,pm8916-pon";
+			reg = <0x0800>;
+			pwrkey {
+				compatible = "qcom,pm8941-pwrkey";
+				interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
+				debounce = <15625>;
+				bias-pull-up;
+				linux,code = <KEY_POWER>;
+			};
+		};
+
+		rtc@6000 {
+			compatible = "qcom,pm8941-rtc";
+			reg = <0x6000>;
+			reg-names = "rtc", "alarm";
+			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
+		};
+
 		pm8150_gpios: gpio@c000 {
 			compatible = "qcom,pm8150-gpio";
 			reg = <0xc000>;
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 08/22] arm64: dts: qcom: pm8150: Add vadc node
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (6 preceding siblings ...)
  2019-08-14 12:49 ` [PATCH 07/22] arm64: dts: qcom: pm8150: Add pon and rtc nodes Vinod Koul
@ 2019-08-14 12:49 ` Vinod Koul
  2019-08-14 17:05   ` Stephen Boyd
  2019-08-14 12:49 ` [PATCH 09/22] arm64: dts: qcom: pm8150b: Add Base DTS file Vinod Koul
                   ` (13 subsequent siblings)
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:49 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

PM8150 PMIC contains vadc device so add node for this.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/pm8150.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi
index 2cb727ce30eb..a137def0e26a 100644
--- a/arch/arm64/boot/dts/qcom/pm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi
@@ -5,6 +5,7 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/spmi/spmi.h>
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
 
 &spmi_bus {
 	pm8150_0: pm8150@0 {
@@ -25,6 +26,33 @@
 			};
 		};
 
+		pm8150_adc: adc@3100 {
+			compatible = "qcom,spmi-adc5";
+			reg = <0x3100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#io-channel-cells = <1>;
+			interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+			ref-gnd@0 {
+				reg = <ADC5_REF_GND>;
+				qcom,pre-scaling = <1 1>;
+				label = "ref_gnd";
+			};
+
+			vref-1p25@1 {
+				reg = <ADC5_1P25VREF>;
+				qcom,pre-scaling = <1 1>;
+				label = "vref_1p25";
+			};
+
+			die-temp@6 {
+				reg = <ADC5_DIE_TEMP>;
+				qcom,pre-scaling = <1 1>;
+				label = "die_temp";
+			};
+		};
+
 		rtc@6000 {
 			compatible = "qcom,pm8941-rtc";
 			reg = <0x6000>;
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 09/22] arm64: dts: qcom: pm8150b: Add Base DTS file
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (7 preceding siblings ...)
  2019-08-14 12:49 ` [PATCH 08/22] arm64: dts: qcom: pm8150: Add vadc node Vinod Koul
@ 2019-08-14 12:49 ` Vinod Koul
  2019-08-14 17:05   ` Stephen Boyd
  2019-08-14 12:50 ` [PATCH 10/22] arm64: dts: qcom: pm8150b: Add pon and adc nodes Vinod Koul
                   ` (12 subsequent siblings)
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:49 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

PMIC pm8150b is a slave pmic and this adds base DTS file for pm8150b

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/pm8150b.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pm8150b.dtsi

diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
new file mode 100644
index 000000000000..c0a678b0f159
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+// Copyright (c) 2019, Linaro Limited
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+	pm8150@2 {
+		compatible = "qcom,spmi-pmic";
+		reg = <0x2 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	qcom,pm8150@3 {
+		compatible ="qcom,spmi-pmic";
+		reg = <0x3 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+};
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 10/22] arm64: dts: qcom: pm8150b: Add pon and adc nodes
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (8 preceding siblings ...)
  2019-08-14 12:49 ` [PATCH 09/22] arm64: dts: qcom: pm8150b: Add Base DTS file Vinod Koul
@ 2019-08-14 12:50 ` Vinod Koul
  2019-08-14 17:08   ` Stephen Boyd
  2019-08-14 18:00   ` Bjorn Andersson
  2019-08-14 12:50 ` [PATCH 11/22] arm64: dts: qcom: pm8150b: Add gpio node Vinod Koul
                   ` (11 subsequent siblings)
  21 siblings, 2 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:50 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

Add the pon and adc nodes found in pm8150b PMIC.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/pm8150b.dtsi | 54 +++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
index c0a678b0f159..846197bd65cd 100644
--- a/arch/arm64/boot/dts/qcom/pm8150b.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
@@ -2,6 +2,7 @@
 // Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
 // Copyright (c) 2019, Linaro Limited
 
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/spmi/spmi.h>
 
@@ -11,6 +12,59 @@
 		reg = <0x2 SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+
+		pon@800 {
+			compatible = "qcom,pm8916-pon";
+			reg = <0x0800>;
+		};
+
+		adc@3100 {
+			compatible = "qcom,spmi-adc5";
+			reg = <0x3100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#io-channel-cells = <1>;
+			interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+			ref-gnd@0 {
+				reg = <ADC5_REF_GND>;
+				qcom,pre-scaling = <1 1>;
+				label = "ref_gnd";
+			};
+
+			vref-1p25@1 {
+				reg = <ADC5_1P25VREF>;
+				qcom,pre-scaling = <1 1>;
+				label = "vref_1p25";
+			};
+
+			die-temp@6 {
+				reg = <ADC5_DIE_TEMP>;
+				qcom,pre-scaling = <1 1>;
+				label = "die_temp";
+			};
+
+			chg-temp@9 {
+				reg = <ADC5_CHG_TEMP>;
+				qcom,pre-scaling = <1 1>;
+				label = "chg_temp";
+			};
+
+			smb1390-therm@14 {
+				reg = <ADC5_AMUX_THM2>;
+				qcom,hw-settle-time = <200>;
+				qcom,pre-scaling = <1 1>;
+				label = "smb1390_therm";
+			};
+
+			smb1355-therm@78 {
+				reg = <ADC5_AMUX_THM2_100K_PU>;
+				qcom,ratiometric;
+				qcom,hw-settle-time = <200>;
+				qcom,pre-scaling = <1 1>;
+				label = "smb1355_therm";
+			};
+		};
 	};
 
 	qcom,pm8150@3 {
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 11/22] arm64: dts: qcom: pm8150b: Add gpio node
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (9 preceding siblings ...)
  2019-08-14 12:50 ` [PATCH 10/22] arm64: dts: qcom: pm8150b: Add pon and adc nodes Vinod Koul
@ 2019-08-14 12:50 ` Vinod Koul
  2019-08-14 17:08   ` Stephen Boyd
  2019-08-14 12:50 ` [PATCH 12/22] arm64: dts: qcom: pm8150l: Add Base DTS file Vinod Koul
                   ` (10 subsequent siblings)
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:50 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

Add the gpio node found in pm8150b PMIC.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/pm8150b.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
index 846197bd65cd..2bb2384461f7 100644
--- a/arch/arm64/boot/dts/qcom/pm8150b.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
@@ -65,6 +65,25 @@
 				label = "smb1355_therm";
 			};
 		};
+
+		pm8150b_gpios: gpio@c000 {
+			compatible = "qcom,pm8150b-gpio";
+			reg = <0xc000>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupts = <0x2 0xc0 0 IRQ_TYPE_NONE>,
+				     <0x2 0xc1 0 IRQ_TYPE_NONE>,
+				     <0x2 0xc2 0 IRQ_TYPE_NONE>,
+				     <0x2 0xc3 0 IRQ_TYPE_NONE>,
+				     <0x2 0xc4 0 IRQ_TYPE_NONE>,
+				     <0x2 0xc5 0 IRQ_TYPE_NONE>,
+				     <0x2 0xc6 0 IRQ_TYPE_NONE>,
+				     <0x2 0xc7 0 IRQ_TYPE_NONE>,
+				     <0x2 0xc8 0 IRQ_TYPE_NONE>,
+				     <0x2 0xc9 0 IRQ_TYPE_NONE>,
+				     <0x2 0xca 0 IRQ_TYPE_NONE>,
+				     <0x2 0xcb 0 IRQ_TYPE_NONE>;
+		};
 	};
 
 	qcom,pm8150@3 {
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 12/22] arm64: dts: qcom: pm8150l: Add Base DTS file
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (10 preceding siblings ...)
  2019-08-14 12:50 ` [PATCH 11/22] arm64: dts: qcom: pm8150b: Add gpio node Vinod Koul
@ 2019-08-14 12:50 ` Vinod Koul
  2019-08-14 17:10   ` Stephen Boyd
  2019-08-14 12:50 ` [PATCH 13/22] arm64: dts: qcom: pm8150l: Add pon and adc nodes Vinod Koul
                   ` (9 subsequent siblings)
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:50 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

PMIC pm8150l is a slave pmic and this adds base DTS file for pm8150l

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/pm8150l.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pm8150l.dtsi

diff --git a/arch/arm64/boot/dts/qcom/pm8150l.dtsi b/arch/arm64/boot/dts/qcom/pm8150l.dtsi
new file mode 100644
index 000000000000..e61ae6c6dab5
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pm8150l.dtsi
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+// Copyright (c) 2019, Linaro Limited
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+	qcom,pm8150@4 {
+		compatible = "qcom,spmi-pmic";
+		reg = <0x4 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	qcom,pm8150@5 {
+		compatible ="qcom,spmi-pmic";
+		reg = <0x5 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+};
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 13/22] arm64: dts: qcom: pm8150l: Add pon and adc nodes
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (11 preceding siblings ...)
  2019-08-14 12:50 ` [PATCH 12/22] arm64: dts: qcom: pm8150l: Add Base DTS file Vinod Koul
@ 2019-08-14 12:50 ` Vinod Koul
  2019-08-14 17:10   ` Stephen Boyd
  2019-08-14 12:50 ` [PATCH 14/22] arm64: dts: qcom: pm8150l: Add gpio node Vinod Koul
                   ` (8 subsequent siblings)
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:50 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

Add the pon and adc nodes found in pm8150l PMIC.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/pm8150l.dtsi | 33 +++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/pm8150l.dtsi b/arch/arm64/boot/dts/qcom/pm8150l.dtsi
index e61ae6c6dab5..d685dac426a3 100644
--- a/arch/arm64/boot/dts/qcom/pm8150l.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8150l.dtsi
@@ -2,6 +2,7 @@
 // Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
 // Copyright (c) 2019, Linaro Limited
 
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/spmi/spmi.h>
 
@@ -11,6 +12,38 @@
 		reg = <0x4 SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+
+		pon@800 {
+			compatible = "qcom,pm8916-pon";
+			reg = <0x0800>;
+		};
+
+		adc@3100 {
+			compatible = "qcom,spmi-adc5";
+			reg = <0x3100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#io-channel-cells = <1>;
+			interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+			ref-gnd@0 {
+				reg = <ADC5_REF_GND>;
+				qcom,pre-scaling = <1 1>;
+				label = "ref_gnd";
+			};
+
+			vref-1p25@1 {
+				reg = <ADC5_1P25VREF>;
+				qcom,pre-scaling = <1 1>;
+				label = "vref_1p25";
+			};
+
+			die-temp@6 {
+				reg = <ADC5_DIE_TEMP>;
+				qcom,pre-scaling = <1 1>;
+				label = "die_temp";
+			};
+		};
 	};
 
 	qcom,pm8150@5 {
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 14/22] arm64: dts: qcom: pm8150l: Add gpio node
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (12 preceding siblings ...)
  2019-08-14 12:50 ` [PATCH 13/22] arm64: dts: qcom: pm8150l: Add pon and adc nodes Vinod Koul
@ 2019-08-14 12:50 ` Vinod Koul
  2019-08-14 12:50 ` [PATCH 15/22] arm64: dts: qcom: sm8150-mtp: Include pmics Vinod Koul
                   ` (7 subsequent siblings)
  21 siblings, 0 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:50 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

Add the gpio node found in pm8150l PMIC.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/pm8150l.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/pm8150l.dtsi b/arch/arm64/boot/dts/qcom/pm8150l.dtsi
index d685dac426a3..dce72bff0e7a 100644
--- a/arch/arm64/boot/dts/qcom/pm8150l.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8150l.dtsi
@@ -44,6 +44,25 @@
 				label = "die_temp";
 			};
 		};
+
+		pm8150l_gpios: gpio@c000 {
+			compatible = "qcom,pm8150l-gpio";
+			reg = <0xc000>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupts = <0x4 0xc0 0 IRQ_TYPE_NONE>,
+				     <0x4 0xc1 0 IRQ_TYPE_NONE>,
+				     <0x4 0xc2 0 IRQ_TYPE_NONE>,
+				     <0x4 0xc3 0 IRQ_TYPE_NONE>,
+				     <0x4 0xc4 0 IRQ_TYPE_NONE>,
+				     <0x4 0xc5 0 IRQ_TYPE_NONE>,
+				     <0x4 0xc6 0 IRQ_TYPE_NONE>,
+				     <0x4 0xc7 0 IRQ_TYPE_NONE>,
+				     <0x4 0xc8 0 IRQ_TYPE_NONE>,
+				     <0x4 0xc9 0 IRQ_TYPE_NONE>,
+				     <0x4 0xca 0 IRQ_TYPE_NONE>,
+				     <0x4 0xcb 0 IRQ_TYPE_NONE>;
+		};
 	};
 
 	qcom,pm8150@5 {
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 15/22] arm64: dts: qcom: sm8150-mtp: Include pmics
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (13 preceding siblings ...)
  2019-08-14 12:50 ` [PATCH 14/22] arm64: dts: qcom: pm8150l: Add gpio node Vinod Koul
@ 2019-08-14 12:50 ` Vinod Koul
  2019-08-14 12:50 ` [PATCH 16/22] arm64: dts: qcom: sm8150-mtp: Add resin node Vinod Koul
                   ` (6 subsequent siblings)
  21 siblings, 0 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:50 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

sm8150-mtp uses pm8150, pm8150b and pm8150l pmics,
so include the files

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
index 8700f015c074..43ba14cc0b00 100644
--- a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
@@ -5,6 +5,9 @@
 /dts-v1/;
 
 #include "sm8150.dtsi"
+#include "pm8150.dtsi"
+#include "pm8150b.dtsi"
+#include "pm8150l.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. SM8150 MTP";
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 16/22] arm64: dts: qcom: sm8150-mtp: Add resin node
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (14 preceding siblings ...)
  2019-08-14 12:50 ` [PATCH 15/22] arm64: dts: qcom: sm8150-mtp: Include pmics Vinod Koul
@ 2019-08-14 12:50 ` Vinod Koul
  2019-08-14 12:50 ` [PATCH 17/22] arm64: dts: qcom: sm8150: Add apss_shared and apps_rsc nodes Vinod Koul
                   ` (5 subsequent siblings)
  21 siblings, 0 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:50 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

The sm8150-mtp board has a reset button which also works as a volume
down key. Add the node for resin device to handle the resin and volume
down key

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
index 43ba14cc0b00..a42f1c154600 100644
--- a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
@@ -26,6 +26,15 @@
 	status = "okay";
 };
 
+&pon {
+	resin {
+		compatible = "qcom,pm8941-resin";
+		interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
+		debounce = <15625>;
+		bias-pull-up;
+		linux,code = <KEY_VOLUMEDOWN>;
+	};
+};
 &tlmm {
 	gpio-reserved-ranges = <0 4>, <126 4>;
 };
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 17/22] arm64: dts: qcom: sm8150: Add apss_shared and apps_rsc nodes
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (15 preceding siblings ...)
  2019-08-14 12:50 ` [PATCH 16/22] arm64: dts: qcom: sm8150-mtp: Add resin node Vinod Koul
@ 2019-08-14 12:50 ` Vinod Koul
  2019-08-14 17:12   ` Stephen Boyd
  2019-08-14 12:50 ` [PATCH 18/22] arm64: dts: qcom: sm8150: Add reserved-memory regions Vinod Koul
                   ` (4 subsequent siblings)
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:50 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

Add apss_shared and apps_rsc node including the rpmhcc child node

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 30 ++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 5c6b103b042b..5258b79676f6 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -4,6 +4,7 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-sm8150.h>
+#include <dt-bindings/soc/qcom,rpmh-rsc.h>
 
 / {
 	interrupt-parent = <&intc>;
@@ -213,6 +214,12 @@
 			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		apss_shared: mailbox@17c00000 {
+			compatible = "qcom,sm8150-apss-shared";
+			reg = <0x17c00000 0x1000>;
+			#mbox-cells = <1>;
+		};
+
 		timer@17c20000 {
 			#address-cells = <1>;
 			#size-cells = <1>;
@@ -272,6 +279,29 @@
 			};
 		};
 
+		apps_rsc: rsc@18200000 {
+			label = "apps_rsc";
+			compatible = "qcom,rpmh-rsc";
+			reg = <0x18200000 0x10000>,
+			      <0x18210000 0x10000>,
+			      <0x18220000 0x10000>;
+			reg-names = "drv-0", "drv-1", "drv-2";
+			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,tcs-offset = <0xd00>;
+			qcom,drv-id = <2>;
+			qcom,tcs-config = <ACTIVE_TCS  2>,
+					  <SLEEP_TCS   1>,
+					  <WAKE_TCS    1>,
+					  <CONTROL_TCS 0>;
+
+			rpmhcc: clock-controller {
+				compatible = "qcom,sm8150-rpmh-clk";
+				#clock-cells = <1>;
+			};
+		};
+
 		spmi_bus: spmi@c440000 {
 			compatible = "qcom,spmi-pmic-arb";
 			reg = <0x0c440000 0x0001100>,
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 18/22] arm64: dts: qcom: sm8150: Add reserved-memory regions
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (16 preceding siblings ...)
  2019-08-14 12:50 ` [PATCH 17/22] arm64: dts: qcom: sm8150: Add apss_shared and apps_rsc nodes Vinod Koul
@ 2019-08-14 12:50 ` Vinod Koul
  2019-08-14 17:13   ` Stephen Boyd
  2019-08-14 12:50 ` [PATCH 19/22] arm64: dts: qcom: sm8150-mtp: Add regulators Vinod Koul
                   ` (3 subsequent siblings)
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:50 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

Add the reserved memory regions in SM8150

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 111 +++++++++++++++++++++++++++
 1 file changed, 111 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 5258b79676f6..7111e1f092f4 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -153,6 +153,117 @@
 		method = "smc";
 	};
 
+	reserved_memory: reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		hyp_mem: memory@85700000 {
+			reg = <0x0 0x85700000 0x0 0x600000>;
+			no-map;
+		};
+
+		xbl_mem: memory@85d00000 {
+			reg = <0x0 0x85d00000 0x0 0x140000>;
+			no-map;
+		};
+
+		aop_mem: memory@85f00000 {
+			reg = <0x0 0x85f00000 0x0 0x20000>;
+			no-map;
+		};
+
+		aop_cmd_db: memory@85f20000 {
+			compatible = "qcom,cmd-db";
+			reg = <0x0 0x85f20000 0x0 0x20000>;
+			no-map;
+		};
+
+		smem_mem: memory@86000000 {
+			reg = <0x0 0x86000000 0x0 0x200000>;
+			no-map;
+		};
+
+		tz_mem: memory@86200000 {
+			reg = <0x0 0x86200000 0x0 0x3900000>;
+			no-map;
+		};
+
+		rmtfs_mem: memory@89b00000 {
+			compatible = "qcom,rmtfs-mem";
+			reg = <0x0 0x89b00000 0x0 0x200000>;
+			no-map;
+
+			qcom,client-id = <1>;
+			qcom,vmid = <15>;
+		};
+
+		camera_mem: memory@8b700000 {
+			reg = <0x0 0x8b700000 0x0 0x500000>;
+			no-map;
+		};
+
+		wlan_mem: memory@8bc00000 {
+			reg = <0x0 0x8bc00000 0x0 0x180000>;
+			no-map;
+		};
+
+		npu_mem: memory@8bd80000 {
+			reg = <0x0 0x8bd80000 0x0 0x80000>;
+			no-map;
+		};
+
+		adsp_mem: memory@8be00000 {
+			reg = <0x0 0x8be00000 0x0 0x1a00000>;
+			no-map;
+		};
+
+		mpss_mem: memory@8d800000 {
+			reg = <0x0 0x8d800000 0x0 0x9600000>;
+			no-map;
+		};
+
+		venus_mem: memory@96e00000 {
+			reg = <0x0 0x96e00000 0x0 0x500000>;
+			no-map;
+		};
+
+		slpi_mem: memory@97300000 {
+			reg = <0x0 0x97300000 0x0 0x1400000>;
+			no-map;
+		};
+
+		ipa_fw_mem: memory@98700000 {
+			reg = <0x0 0x98700000 0x0 0x10000>;
+			no-map;
+		};
+
+		ipa_gsi_mem: memory@98710000 {
+			reg = <0x0 0x98710000 0x0 0x5000>;
+			no-map;
+		};
+
+		gpu_mem: memory@98715000 {
+			reg = <0x0 0x98715000 0x0 0x2000>;
+			no-map;
+		};
+
+		spss_mem: memory@98800000 {
+			reg = <0x0 0x98800000 0x0 0x100000>;
+			no-map;
+		};
+
+		cdsp_mem: memory@98900000 {
+			reg = <0x0 0x98900000 0x0 0x1400000>;
+			no-map;
+		};
+
+		qseecom_mem: memory@9e400000 {
+			reg = <0 0x9e400000 0 0x1400000>;
+			no-map;
+		};
+	};
+
 	soc: soc@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 19/22] arm64: dts: qcom: sm8150-mtp: Add regulators
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (17 preceding siblings ...)
  2019-08-14 12:50 ` [PATCH 18/22] arm64: dts: qcom: sm8150: Add reserved-memory regions Vinod Koul
@ 2019-08-14 12:50 ` Vinod Koul
  2019-08-14 12:50 ` [PATCH 20/22] arm64: dts: qcom: sm8150: Add pmu node to SM8150 SoC Vinod Koul
                   ` (2 subsequent siblings)
  21 siblings, 0 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:50 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, Stephen Boyd, devicetree, linux-kernel

Add the regulators found in the mtp platform. This platform consists of
pmic PM8150, PM8150L and PM8009.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 327 ++++++++++++++++++++++++
 1 file changed, 327 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
index a42f1c154600..1d08a6daa006 100644
--- a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
@@ -4,6 +4,7 @@
 
 /dts-v1/;
 
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
 #include "sm8150.dtsi"
 #include "pm8150.dtsi"
 #include "pm8150b.dtsi"
@@ -20,6 +21,332 @@
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
+
+	vph_pwr: vph-pwr-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vph_pwr";
+		regulator-min-microvolt = <3700000>;
+		regulator-max-microvolt = <3700000>;
+	};
+
+	/*
+	 * Apparently RPMh does not provide support for PM8150 S4 because it
+	 * is always-on; model it as a fixed regulator.
+	 */
+	vreg_s4a_1p8: pm8150-s4 {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg_s4a_1p8";
+
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+
+		regulator-always-on;
+		regulator-boot-on;
+
+		vin-supply = <&vph_pwr>;
+	};
+};
+
+&apps_rsc {
+	pm8150-rpmh-regulators {
+		compatible = "qcom,pm8150-rpmh-regulators";
+		qcom,pmic-id = "a";
+
+		vdd-s1-supply = <&vph_pwr>;
+		vdd-s2-supply = <&vph_pwr>;
+		vdd-s3-supply = <&vph_pwr>;
+		vdd-s4-supply = <&vph_pwr>;
+		vdd-s5-supply = <&vph_pwr>;
+		vdd-s6-supply = <&vph_pwr>;
+		vdd-s7-supply = <&vph_pwr>;
+		vdd-s8-supply = <&vph_pwr>;
+		vdd-s9-supply = <&vph_pwr>;
+		vdd-s10-supply = <&vph_pwr>;
+
+		vdd-l1-l8-l11-supply = <&vreg_s6a_0p9>;
+		vdd-l2-l10-supply = <&vreg_bob>;
+		vdd-l3-l4-l5-l18-supply = <&vreg_s6a_0p9>;
+		vdd-l6-l9-supply = <&vreg_s8c_1p3>;
+		vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p0>;
+		vdd-l13-l16-l17-supply = <&vreg_bob>;
+
+		vreg_s5a_2p0: smps5 {
+			regulator-min-microvolt = <1904000>;
+			regulator-max-microvolt = <2000000>;
+		};
+
+		vreg_s6a_0p9: smps6 {
+			regulator-min-microvolt = <920000>;
+			regulator-max-microvolt = <1128000>;
+		};
+
+		vdda_wcss_pll:
+		vreg_l1a_0p75: ldo1 {
+			regulator-min-microvolt = <752000>;
+			regulator-max-microvolt = <752000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vdd_pdphy:
+		vdda_usb_hs_3p1:
+		vreg_l2a_3p1: ldo2 {
+			regulator-min-microvolt = <3072000>;
+			regulator-max-microvolt = <3072000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l3a_0p8: ldo3 {
+			regulator-min-microvolt = <480000>;
+			regulator-max-microvolt = <932000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vdd_usb_hs_core:
+		vdda_csi_0_0p9:
+		vdda_csi_1_0p9:
+		vdda_csi_2_0p9:
+		vdda_csi_3_0p9:
+		vdda_dsi_0_0p9:
+		vdda_dsi_1_0p9:
+		vdda_dsi_0_pll_0p9:
+		vdda_dsi_1_pll_0p9:
+		vdda_pcie_1ln_core:
+		vdda_pcie_2ln_core:
+		vdda_pll_hv_cc_ebi01:
+		vdda_pll_hv_cc_ebi23:
+		vdda_qrefs_0p875_5:
+		vdda_sp_sensor:
+		vdda_ufs_2ln_core_1:
+		vdda_ufs_2ln_core_2:
+		vdda_usb_ss_dp_core_1:
+		vdda_usb_ss_dp_core_2:
+		vdda_qlink_lv:
+		vdda_qlink_lv_ck:
+		vreg_l5a_0p875: ldo5 {
+			regulator-min-microvolt = <880000>;
+			regulator-max-microvolt = <880000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l6a_1p2: ldo6 {
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l7a_1p8: ldo7 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vddpx_10:
+		vreg_l9a_1p2: ldo9 {
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+
+		vreg_l10a_2p5: ldo10 {
+			regulator-min-microvolt = <2504000>;
+			regulator-max-microvolt = <2960000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l11a_0p8: ldo11 {
+			regulator-min-microvolt = <800000>;
+			regulator-max-microvolt = <800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vdd_qfprom:
+		vdd_qfprom_sp:
+		vdda_apc_cs_1p8:
+		vdda_gfx_cs_1p8:
+		vdda_usb_hs_1p8:
+		vdda_qrefs_vref_1p8:
+		vddpx_10_a:
+		vreg_l12a_1p8: ldo12 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l13a_2p7: ldo13 {
+			regulator-min-microvolt = <2704000>;
+			regulator-max-microvolt = <2704000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l14a_1p8: ldo14 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1880000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l15a_1p7: ldo15 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <1704000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l16a_2p7: ldo16 {
+			regulator-min-microvolt = <2704000>;
+			regulator-max-microvolt = <2960000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l17a_3p0: ldo17 {
+			regulator-min-microvolt = <2856000>;
+			regulator-max-microvolt = <3008000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	pm8150l-rpmh-regulators {
+		compatible = "qcom,pm8150l-rpmh-regulators";
+		qcom,pmic-id = "c";
+
+		vdd-s1-supply = <&vph_pwr>;
+		vdd-s2-supply = <&vph_pwr>;
+		vdd-s3-supply = <&vph_pwr>;
+		vdd-s4-supply = <&vph_pwr>;
+		vdd-s5-supply = <&vph_pwr>;
+		vdd-s6-supply = <&vph_pwr>;
+		vdd-s7-supply = <&vph_pwr>;
+		vdd-s8-supply = <&vph_pwr>;
+
+		vdd-l1-l8-supply = <&vreg_s4a_1p8>;
+		vdd-l2-l3-supply = <&vreg_s8c_1p3>;
+		vdd-l4-l5-l6-supply = <&vreg_bob>;
+		vdd-l7-l11-supply = <&vreg_bob>;
+		vdd-l9-l10-supply = <&vreg_bob>;
+
+		vdd-bob-supply = <&vph_pwr>;
+		vdd-flash-supply = <&vreg_bob>;
+		vdd-rgb-supply = <&vreg_bob>;
+
+		vreg_bob: bob {
+			regulator-min-microvolt = <3008000>;
+			regulator-max-microvolt = <4000000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
+			regulator-allow-bypass;
+		};
+
+		vreg_s8c_1p3: smps8 {
+			regulator-min-microvolt = <1352000>;
+			regulator-max-microvolt = <1352000>;
+		};
+
+		vreg_l1c_1p8: ldo1 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vdda_wcss_adcdac_1:
+		vdda_wcss_adcdac_22:
+		vreg_l2c_1p3: ldo2 {
+			regulator-min-microvolt = <1304000>;
+			regulator-max-microvolt = <1304000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vdda_hv_ebi0:
+		vdda_hv_ebi1:
+		vdda_hv_ebi2:
+		vdda_hv_ebi3:
+		vdda_hv_refgen0:
+		vdda_qlink_hv_ck:
+		vreg_l3c_1p2: ldo3 {
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vddpx_5:
+		vreg_l4c_1p8: ldo4 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <2928000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vddpx_6:
+		vreg_l5c_1p8: ldo5 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <2928000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vddpx_2:
+		vreg_l6c_2p9: ldo6 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <2960000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l7c_3p0: ldo7 {
+			regulator-min-microvolt = <2856000>;
+			regulator-max-microvolt = <3104000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l8c_1p8: ldo8 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l9c_2p9: ldo9 {
+			regulator-min-microvolt = <2704000>;
+			regulator-max-microvolt = <2960000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+
+		vreg_l10c_3p3: ldo10 {
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l11c_3p3: ldo11 {
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	pm8009-rpmh-regulators {
+		compatible = "qcom,pm8009-rpmh-regulators";
+		qcom,pmic-id = "f";
+
+		vdd-s1-supply = <&vph_pwr>;
+		vdd-s2-supply = <&vreg_bob>;
+
+		vdd-l2-supply = <&vreg_s8c_1p3>;
+		vdd-l5-l6-supply = <&vreg_bob>;
+
+		vreg_l2f_1p2: ldo2 {
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l5f_2p85: ldo5 {
+			regulator-min-microvolt = <2800000>;
+			regulator-max-microvolt = <2800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l6f_2p85: ldo6 {
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-min-microvolt = <2856000>;
+			regulator-max-microvolt = <2856000>;
+		};
+	};
+
 };
 
 &qupv3_id_1 {
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 20/22] arm64: dts: qcom: sm8150: Add pmu node to SM8150 SoC
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (18 preceding siblings ...)
  2019-08-14 12:50 ` [PATCH 19/22] arm64: dts: qcom: sm8150-mtp: Add regulators Vinod Koul
@ 2019-08-14 12:50 ` Vinod Koul
  2019-08-14 17:15   ` Stephen Boyd
  2019-08-14 12:50 ` [PATCH 21/22] arm64: dts: qcom: sm8150: Add SMEM nodes Vinod Koul
  2019-08-14 12:50 ` [PATCH 22/22] arm64: dts: qcom: sm8150: Add APSS shared mailbox Vinod Koul
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:50 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Rob Herring, Mark Rutland,
	Stephen Boyd, devicetree, linux-kernel, Vinod Koul

From: Sibi Sankar <sibis@codeaurora.org>

Add the CPU PMU on SM8150 to get perf support for hardware events.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 7111e1f092f4..19be87dc893f 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -148,6 +148,11 @@
 		reg = <0 0x80000000 0 0>;
 	};
 
+	pmu {
+		compatible = "arm,armv8-pmuv3";
+		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 21/22] arm64: dts: qcom: sm8150: Add SMEM nodes
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (19 preceding siblings ...)
  2019-08-14 12:50 ` [PATCH 20/22] arm64: dts: qcom: sm8150: Add pmu node to SM8150 SoC Vinod Koul
@ 2019-08-14 12:50 ` Vinod Koul
  2019-08-14 17:16   ` Stephen Boyd
  2019-08-14 12:50 ` [PATCH 22/22] arm64: dts: qcom: sm8150: Add APSS shared mailbox Vinod Koul
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:50 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Rob Herring, Mark Rutland,
	Stephen Boyd, devicetree, linux-kernel, Vinod Koul

From: Sibi Sankar <sibis@codeaurora.org>

Add the necessary dt nodes to support SMEM on SM8150 SoC.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 19be87dc893f..5df3f335272a 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -142,6 +142,12 @@
 		};
 	};
 
+	tcsr_mutex: hwlock {
+		compatible = "qcom,tcsr-mutex";
+		syscon = <&tcsr_mutex_regs 0 0x1000>;
+		#hwlock-cells = <1>;
+	};
+
 	memory@80000000 {
 		device_type = "memory";
 		/* We expect the bootloader to fill in the size */
@@ -269,6 +275,12 @@
 		};
 	};
 
+	smem {
+		compatible = "qcom,smem";
+		memory-region = <&smem_mem>;
+		hwlocks = <&tcsr_mutex 3>;
+	};
+
 	soc: soc@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -306,6 +318,11 @@
 			};
 		};
 
+		tcsr_mutex_regs: syscon@1f40000 {
+			compatible = "syscon";
+			reg = <0x01f40000 0x40000>;
+		};
+
 		tlmm: pinctrl@3100000 {
 			compatible = "qcom,sm8150-pinctrl";
 			reg = <0x03100000 0x300000>,
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* [PATCH 22/22] arm64: dts: qcom: sm8150: Add APSS shared mailbox
  2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
                   ` (20 preceding siblings ...)
  2019-08-14 12:50 ` [PATCH 21/22] arm64: dts: qcom: sm8150: Add SMEM nodes Vinod Koul
@ 2019-08-14 12:50 ` Vinod Koul
  2019-08-14 17:17   ` Stephen Boyd
  21 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-14 12:50 UTC (permalink / raw)
  To: Andy Gross
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Rob Herring, Mark Rutland,
	Stephen Boyd, devicetree, linux-kernel, Vinod Koul

From: Sibi Sankar <sibis@codeaurora.org>

Add APSS shared mailbox support to SM8150 SoC.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 5df3f335272a..88cbab4a9297 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -5,6 +5,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-sm8150.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
+#include <dt-bindings/clock/qcom,rpmh.h>
 
 / {
 	interrupt-parent = <&intc>;
@@ -338,6 +339,16 @@
 			#interrupt-cells = <2>;
 		};
 
+		aoss_qmp: qmp@c300000 {
+			compatible = "qcom,sm8150-aoss-qmp";
+			reg = <0x0c300000 0x100000>;
+			interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
+			mboxes = <&apss_shared 0>;
+
+			#clock-cells = <0>;
+			#power-domain-cells = <1>;
+		};
+
 		intc: interrupt-controller@17a00000 {
 			compatible = "arm,gic-v3";
 			interrupt-controller;
-- 
2.20.1


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 01/22] arm64: dts: qcom: sm8150: add base dts file
  2019-08-14 12:49 ` [PATCH 01/22] arm64: dts: qcom: sm8150: add base dts file Vinod Koul
@ 2019-08-14 16:58   ` Stephen Boyd
  2019-08-14 17:44     ` Bjorn Andersson
  2019-08-14 17:50   ` Bjorn Andersson
  1 sibling, 1 reply; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 16:58 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:49:51)
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> new file mode 100644
> index 000000000000..cd9fcadaeacb
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -0,0 +1,269 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +// Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> +// Copyright (c) 2019, Linaro Limited
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/clock/qcom,gcc-sm8150.h>
> +
> +/ {
> +       interrupt-parent = <&intc>;
> +
> +       #address-cells = <2>;
> +       #size-cells = <2>;
> +
> +       chosen { };
> +
> +       clocks {
> +               xo_board: xo-board {
> +                       compatible = "fixed-clock";
> +                       #clock-cells = <0>;
> +                       clock-frequency = <19200000>;

Is it 19.2 or 38.4 MHz? It seems like lately there are dividers, but I
guess it doesn't really matter in the end.

> +                       clock-output-names = "xo_board";
> +               };
> +
> +               sleep_clk: sleep-clk {
> +                       compatible = "fixed-clock";
> +                       #clock-cells = <0>;
> +                       clock-frequency = <32764>;
> +                       clock-output-names = "sleep_clk";

Does it matter to have this property anymore? Presumably it's OK if the
name is now sleep-clk instead of sleep_clk because the name doesn't
matter to connect clk tree.

> +               };
> +       };
> +
> +       cpus {
> +               #address-cells = <2>;
> +               #size-cells = <0>;
> +
> +               CPU0: cpu@0 {
> +                       device_type = "cpu";
> +                       compatible = "qcom,kryo485";
> +                       reg = <0x0 0x0>;
> +                       enable-method = "psci";
> +                       next-level-cache = <&L2_0>;
> +                       L2_0: l2-cache {
> +                               compatible = "cache";
> +                               next-level-cache = <&L3_0>;
> +                               L3_0: l3-cache {
> +                                     compatible = "cache";
> +                               };
> +                       };
> +               };
> +
> +               CPU1: cpu@100 {
> +                       device_type = "cpu";
> +                       compatible = "qcom,kryo485";
> +                       reg = <0x0 0x100>;
> +                       enable-method = "psci";
> +                       next-level-cache = <&L2_100>;
> +                       L2_100: l2-cache {
> +                               compatible = "cache";
> +                               next-level-cache = <&L3_0>;
> +                       };
> +
> +               };
> +
> +               CPU2: cpu@200 {
> +                       device_type = "cpu";
> +                       compatible = "qcom,kryo485";
> +                       reg = <0x0 0x200>;
> +                       enable-method = "psci";
> +                       next-level-cache = <&L2_200>;
> +                       L2_200: l2-cache {
> +                               compatible = "cache";
> +                               next-level-cache = <&L3_0>;
> +                       };
> +               };
> +
> +               CPU3: cpu@300 {
> +                       device_type = "cpu";
> +                       compatible = "qcom,kryo485";
> +                       reg = <0x0 0x300>;
> +                       enable-method = "psci";
> +                       next-level-cache = <&L2_300>;
> +                       L2_300: l2-cache {
> +                               compatible = "cache";
> +                               next-level-cache = <&L3_0>;
> +                       };
> +               };
> +
> +               CPU4: cpu@400 {
> +                       device_type = "cpu";
> +                       compatible = "qcom,kryo485";
> +                       reg = <0x0 0x400>;
> +                       enable-method = "psci";
> +                       next-level-cache = <&L2_400>;
> +                       L2_400: l2-cache {
> +                               compatible = "cache";
> +                               next-level-cache = <&L3_0>;
> +                       };
> +               };
> +
> +               CPU5: cpu@500 {
> +                       device_type = "cpu";
> +                       compatible = "qcom,kryo485";
> +                       reg = <0x0 0x500>;
> +                       enable-method = "psci";
> +                       next-level-cache = <&L2_500>;
> +                       L2_500: l2-cache {
> +                               compatible = "cache";
> +                               next-level-cache = <&L3_0>;
> +                       };
> +               };
> +
> +               CPU6: cpu@600 {
> +                       device_type = "cpu";
> +                       compatible = "qcom,kryo485";
> +                       reg = <0x0 0x600>;
> +                       enable-method = "psci";
> +                       next-level-cache = <&L2_600>;
> +                       L2_600: l2-cache {
> +                               compatible = "cache";
> +                               next-level-cache = <&L3_0>;
> +                       };
> +               };
> +
> +               CPU7: cpu@700 {
> +                       device_type = "cpu";
> +                       compatible = "qcom,kryo485";

Is this compatible documented?

> +                       reg = <0x0 0x700>;
> +                       enable-method = "psci";
> +                       next-level-cache = <&L2_700>;
> +                       L2_700: l2-cache {
> +                               compatible = "cache";
> +                               next-level-cache = <&L3_0>;
> +                       };
> +               };
> +       };
> +
> +       firmware {
> +               scm: scm {
> +                       compatible = "qcom,scm-sm8150", "qcom,scm";
> +                       #reset-cells = <1>;
> +               };
> +       };
> +
> +       memory@80000000 {
> +               device_type = "memory";
> +               /* We expect the bootloader to fill in the size */
> +               reg = <0 0x80000000 0 0>;
> +       };
> +
> +       psci {
> +               compatible = "arm,psci-1.0";
> +               method = "smc";
> +       };
> +
> +       soc: soc@0 {
> +               #address-cells = <1>;
> +               #size-cells = <1>;
> +               ranges = <0 0 0 0xffffffff>;
> +               compatible = "simple-bus";
> +
> +               gcc: clock-controller@100000 {
> +                       compatible = "qcom,gcc-sm8150";
> +                       reg = <0x00100000 0x1f0000>;
> +                       #clock-cells = <1>;
> +                       #reset-cells = <1>;
> +                       #power-domain-cells = <1>;
> +                       clock-names = "bi_tcxo", "sleep_clk";
> +                       clocks = <&xo_board>, <&sleep_clk>;
> +               };
> +
> +               qupv3_id_1: geniqup@ac0000 {
> +                       compatible = "qcom,geni-se-qup";
> +                       reg = <0x00ac0000 0x6000>;
> +                       clock-names = "m-ahb", "s-ahb";
> +                       clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
> +                                <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
> +                       #address-cells = <1>;
> +                       #size-cells = <1>;
> +                       ranges;
> +                       status = "disabled";
> +
> +                       uart2: serial@a90000 {
> +                               compatible = "qcom,geni-debug-uart";
> +                               reg = <0x00a90000 0x4000>;
> +                               clock-names = "se";
> +                               clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
> +                               interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> +                               status = "disabled";
> +                       };
> +               };
> +
> +               intc: interrupt-controller@17a00000 {
> +                       compatible = "arm,gic-v3";
> +                       interrupt-controller;
> +                       #interrupt-cells = <3>;
> +                       reg = <0x17a00000 0x10000>,     /* GICD */
> +                             <0x17a60000 0x100000>;    /* GICR * 8 */
> +                       interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;

Is there an its node? Probably the same as sdm845?

> +               };
> +
> +               timer@17c20000 {
> +                       #address-cells = <1>;
> +                       #size-cells = <1>;
> +                       ranges;
> +                       compatible = "arm,armv7-timer-mem";
> +                       reg = <0x17c20000 0x1000>;
> +                       clock-frequency = <19200000>;

This property shouldn't be necessary. Please remove.

> +
> +                       frame@17c21000{
> +                               frame-number = <0>;
> +                               interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
> +                                            <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 03/22] arm64: dts: qcom: sm8150: add tlmm node
  2019-08-14 12:49 ` [PATCH 03/22] arm64: dts: qcom: sm8150: add tlmm node Vinod Koul
@ 2019-08-14 17:01   ` Stephen Boyd
  2019-08-19 17:09     ` Vinod Koul
  0 siblings, 1 reply; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:01 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:49:53)
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---

Add some commit text? Or just squash with the first patch? Not sure why
it's a different commit.

>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index cd9fcadaeacb..5f2f21270e2d 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -189,6 +189,21 @@
>                         };
>                 };
>  
> +               tlmm: pinctrl@3100000 {
> +                       compatible = "qcom,sm8150-pinctrl";
> +                       reg = <0x03100000 0x300000>,
> +                             <0x03500000 0x300000>,
> +                             <0x03900000 0x300000>,
> +                             <0x03D00000 0x300000>;

Please don't use capitalized hex characters.

> +                       reg-names = "west", "east", "north", "south";
> +                       interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> +                       gpio-ranges = <&tlmm 0 0 175>;
> +                       gpio-controller;
> +                       #gpio-cells = <2>;
> +                       interrupt-controller;
> +                       #interrupt-cells = <2>;
> +               };
> +

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 04/22] arm64: dts: qcom: sm8150-mtp: add tlmm reserved range
  2019-08-14 12:49 ` [PATCH 04/22] arm64: dts: qcom: sm8150-mtp: add tlmm reserved range Vinod Koul
@ 2019-08-14 17:01   ` Stephen Boyd
  0 siblings, 0 replies; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:01 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:49:54)
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---

Squash?

>  arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 4 ++++
>  1 file changed, 4 insertions(+)
> 

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 05/22] arm64: dts: qcom: sm8150: Add spmi node
  2019-08-14 12:49 ` [PATCH 05/22] arm64: dts: qcom: sm8150: Add spmi node Vinod Koul
@ 2019-08-14 17:01   ` Stephen Boyd
  0 siblings, 0 replies; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:01 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:49:55)
> Add SPMI node which is used for spmi_bus
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)

Squash?


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 06/22] arm64: dts: qcom: pm8150: Add Base DTS file
  2019-08-14 12:49 ` [PATCH 06/22] arm64: dts: qcom: pm8150: Add Base DTS file Vinod Koul
@ 2019-08-14 17:03   ` Stephen Boyd
  2019-08-19 17:28     ` Vinod Koul
  0 siblings, 1 reply; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:03 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:49:56)
> Add base DTS file for pm8150 along with GPIOs
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
>  arch/arm64/boot/dts/qcom/pm8150.dtsi | 41 ++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/pm8150.dtsi
> 
> diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi
> new file mode 100644
> index 000000000000..b533e254a203
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi
> @@ -0,0 +1,41 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +// Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> +// Copyright (c) 2019, Linaro Limited
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/spmi/spmi.h>
> +
> +&spmi_bus {
> +       pm8150_0: pm8150@0 {

I think node name should be 'pmic'

> +               compatible = "qcom,spmi-pmic";

This should also have the model number? "qcom,pm8150"?

> +               reg = <0x0 SPMI_USID>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               pm8150_gpios: gpio@c000 {
> +                       compatible = "qcom,pm8150-gpio";
> +                       reg = <0xc000>;
> +                       gpio-controller;
> +                       #gpio-cells = <2>;
> +                       interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
> +                                    <0 0xc1 0 IRQ_TYPE_NONE>,
> +                                    <0 0xc2 0 IRQ_TYPE_NONE>,
> +                                    <0 0xc3 0 IRQ_TYPE_NONE>,
> +                                    <0 0xc4 0 IRQ_TYPE_NONE>,
> +                                    <0 0xc5 0 IRQ_TYPE_NONE>,
> +                                    <0 0xc6 0 IRQ_TYPE_NONE>,
> +                                    <0 0xc7 0 IRQ_TYPE_NONE>,
> +                                    <0 0xc8 0 IRQ_TYPE_NONE>,
> +                                    <0 0xc9 0 IRQ_TYPE_NONE>,
> +                                    <0 0xca 0 IRQ_TYPE_NONE>,
> +                                    <0 0xcb 0 IRQ_TYPE_NONE>;
> +               };
> +       };
> +
> +       qcom,pm8150@1 {

Same comment, pmic@1.

> +               compatible ="qcom,spmi-pmic";
> +               reg = <0x1 SPMI_USID>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +       };
> +};

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 07/22] arm64: dts: qcom: pm8150: Add pon and rtc nodes
  2019-08-14 12:49 ` [PATCH 07/22] arm64: dts: qcom: pm8150: Add pon and rtc nodes Vinod Koul
@ 2019-08-14 17:03   ` Stephen Boyd
  2019-08-19 17:32     ` Vinod Koul
  0 siblings, 1 reply; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:03 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:49:57)
> PM8150 PMIC contains pon and rtc devices so add nodes for these.
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---

Squash this with the other patch?

> @@ -12,6 +13,25 @@
>                 #address-cells = <1>;
>                 #size-cells = <0>;
>  
> +               pon: pon@800 {
> +                       compatible = "qcom,pm8916-pon";
> +                       reg = <0x0800>;
> +                       pwrkey {
> +                               compatible = "qcom,pm8941-pwrkey";
> +                               interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
> +                               debounce = <15625>;
> +                               bias-pull-up;
> +                               linux,code = <KEY_POWER>;

status = "disabled"?

> +                       };
> +               };
> +
> +               rtc@6000 {
> +                       compatible = "qcom,pm8941-rtc";
> +                       reg = <0x6000>;
> +                       reg-names = "rtc", "alarm";
> +                       interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;

status = "disabled"?

> +               };
> +
>                 pm8150_gpios: gpio@c000 {
>                         compatible = "qcom,pm8150-gpio";
>                         reg = <0xc000>;
> -- 
> 2.20.1
> 

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 08/22] arm64: dts: qcom: pm8150: Add vadc node
  2019-08-14 12:49 ` [PATCH 08/22] arm64: dts: qcom: pm8150: Add vadc node Vinod Koul
@ 2019-08-14 17:05   ` Stephen Boyd
  0 siblings, 0 replies; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:05 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:49:58)
> @@ -25,6 +26,33 @@
>                         };
>                 };
>  
> +               pm8150_adc: adc@3100 {
> +                       compatible = "qcom,spmi-adc5";
> +                       reg = <0x3100>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       #io-channel-cells = <1>;
> +                       interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;

status = "disabled"? I imagine there are cases where some board doesn't
want to use the ADC for anything.

> +
> +                       ref-gnd@0 {
> +                               reg = <ADC5_REF_GND>;
> +                               qcom,pre-scaling = <1 1>;
> +                               label = "ref_gnd";
> +                       };
> +
> +                       vref-1p25@1 {
> +                               reg = <ADC5_1P25VREF>;
> +                               qcom,pre-scaling = <1 1>;
> +                               label = "vref_1p25";
> +                       };
> +
> +                       die-temp@6 {
> +                               reg = <ADC5_DIE_TEMP>;
> +                               qcom,pre-scaling = <1 1>;
> +                               label = "die_temp";
> +                       };

Are these board level details?

> +               };
> +
>                 rtc@6000 {
>                         compatible = "qcom,pm8941-rtc";
>                         reg = <0x6000>;
> -- 
> 2.20.1
> 

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 09/22] arm64: dts: qcom: pm8150b: Add Base DTS file
  2019-08-14 12:49 ` [PATCH 09/22] arm64: dts: qcom: pm8150b: Add Base DTS file Vinod Koul
@ 2019-08-14 17:05   ` Stephen Boyd
  0 siblings, 0 replies; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:05 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:49:59)
> diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> new file mode 100644
> index 000000000000..c0a678b0f159
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> @@ -0,0 +1,22 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +// Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> +// Copyright (c) 2019, Linaro Limited
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/spmi/spmi.h>
> +
> +&spmi_bus {
> +       pm8150@2 {

pmic.

> +               compatible = "qcom,spmi-pmic";
> +               reg = <0x2 SPMI_USID>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +       };
> +
> +       qcom,pm8150@3 {

pmic. Funny this one has qcom, prefix!

> +               compatible ="qcom,spmi-pmic";
> +               reg = <0x3 SPMI_USID>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +       };
> +};
> -- 
> 2.20.1
> 

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 10/22] arm64: dts: qcom: pm8150b: Add pon and adc nodes
  2019-08-14 12:50 ` [PATCH 10/22] arm64: dts: qcom: pm8150b: Add pon and adc nodes Vinod Koul
@ 2019-08-14 17:08   ` Stephen Boyd
  2019-08-19 17:43     ` Vinod Koul
  2019-08-14 18:00   ` Bjorn Andersson
  1 sibling, 1 reply; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:08 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:50:00)
> Add the pon and adc nodes found in pm8150b PMIC.
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
>  arch/arm64/boot/dts/qcom/pm8150b.dtsi | 54 +++++++++++++++++++++++++++
>  1 file changed, 54 insertions(+)

Squash?

> 
> diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> index c0a678b0f159..846197bd65cd 100644
> --- a/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> +++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> @@ -2,6 +2,7 @@
>  // Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
>  // Copyright (c) 2019, Linaro Limited
>  
> +#include <dt-bindings/iio/qcom,spmi-vadc.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/spmi/spmi.h>
>  
> @@ -11,6 +12,59 @@
>                 reg = <0x2 SPMI_USID>;
>                 #address-cells = <1>;
>                 #size-cells = <0>;
> +
> +               pon@800 {

Maybe pon node name should be 'key' or 'power-on'?

> +                       compatible = "qcom,pm8916-pon";
> +                       reg = <0x0800>;
> +               };
> +
> +               adc@3100 {
> +                       compatible = "qcom,spmi-adc5";
> +                       reg = <0x3100>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       #io-channel-cells = <1>;
> +                       interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
> +
> +                       ref-gnd@0 {
> +                               reg = <ADC5_REF_GND>;
> +                               qcom,pre-scaling = <1 1>;
> +                               label = "ref_gnd";
> +                       };
> +
> +                       vref-1p25@1 {
> +                               reg = <ADC5_1P25VREF>;
> +                               qcom,pre-scaling = <1 1>;
> +                               label = "vref_1p25";
> +                       };
> +
> +                       die-temp@6 {
> +                               reg = <ADC5_DIE_TEMP>;
> +                               qcom,pre-scaling = <1 1>;
> +                               label = "die_temp";
> +                       };
> +
> +                       chg-temp@9 {
> +                               reg = <ADC5_CHG_TEMP>;
> +                               qcom,pre-scaling = <1 1>;
> +                               label = "chg_temp";
> +                       };
> +
> +                       smb1390-therm@14 {
> +                               reg = <ADC5_AMUX_THM2>;
> +                               qcom,hw-settle-time = <200>;
> +                               qcom,pre-scaling = <1 1>;
> +                               label = "smb1390_therm";
> +                       };
> +
> +                       smb1355-therm@78 {
> +                               reg = <ADC5_AMUX_THM2_100K_PU>;
> +                               qcom,ratiometric;
> +                               qcom,hw-settle-time = <200>;
> +                               qcom,pre-scaling = <1 1>;
> +                               label = "smb1355_therm";
> +                       };

Again, are these board level details? Maybe should be provided here with
status = "disabled" and then added by the boards that use these ADCs.

> +               };
>         };

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 11/22] arm64: dts: qcom: pm8150b: Add gpio node
  2019-08-14 12:50 ` [PATCH 11/22] arm64: dts: qcom: pm8150b: Add gpio node Vinod Koul
@ 2019-08-14 17:08   ` Stephen Boyd
  0 siblings, 0 replies; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:08 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:50:01)
> Add the gpio node found in pm8150b PMIC.
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
>  arch/arm64/boot/dts/qcom/pm8150b.dtsi | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)

Squash it?


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 12/22] arm64: dts: qcom: pm8150l: Add Base DTS file
  2019-08-14 12:50 ` [PATCH 12/22] arm64: dts: qcom: pm8150l: Add Base DTS file Vinod Koul
@ 2019-08-14 17:10   ` Stephen Boyd
  0 siblings, 0 replies; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:10 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:50:02)
> PMIC pm8150l is a slave pmic and this adds base DTS file for pm8150l
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
>  arch/arm64/boot/dts/qcom/pm8150l.dtsi | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/pm8150l.dtsi
> 
> diff --git a/arch/arm64/boot/dts/qcom/pm8150l.dtsi b/arch/arm64/boot/dts/qcom/pm8150l.dtsi
> new file mode 100644
> index 000000000000..e61ae6c6dab5
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/pm8150l.dtsi
> @@ -0,0 +1,22 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +// Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> +// Copyright (c) 2019, Linaro Limited
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/spmi/spmi.h>
> +
> +&spmi_bus {
> +       qcom,pm8150@4 {

pmic

> +               compatible = "qcom,spmi-pmic";

Update compatible string too.

> +               reg = <0x4 SPMI_USID>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +       };
> +
> +       qcom,pm8150@5 {
> +               compatible ="qcom,spmi-pmic";
> +               reg = <0x5 SPMI_USID>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +       };
> +};

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 13/22] arm64: dts: qcom: pm8150l: Add pon and adc nodes
  2019-08-14 12:50 ` [PATCH 13/22] arm64: dts: qcom: pm8150l: Add pon and adc nodes Vinod Koul
@ 2019-08-14 17:10   ` Stephen Boyd
  0 siblings, 0 replies; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:10 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:50:03)
> Add the pon and adc nodes found in pm8150l PMIC.
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
>  arch/arm64/boot/dts/qcom/pm8150l.dtsi | 33 +++++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)

Wow it's all the same! :)


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 17/22] arm64: dts: qcom: sm8150: Add apss_shared and apps_rsc nodes
  2019-08-14 12:50 ` [PATCH 17/22] arm64: dts: qcom: sm8150: Add apss_shared and apps_rsc nodes Vinod Koul
@ 2019-08-14 17:12   ` Stephen Boyd
  2019-08-19 17:35     ` Vinod Koul
  0 siblings, 1 reply; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:12 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:50:07)
> Add apss_shared and apps_rsc node including the rpmhcc child node
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---

Can't this be squashed with the original dtsi file?

>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 30 ++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 5c6b103b042b..5258b79676f6 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -4,6 +4,7 @@
>  
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/clock/qcom,gcc-sm8150.h>
> +#include <dt-bindings/soc/qcom,rpmh-rsc.h>

But not the rpmh clk bindings?

> @@ -272,6 +279,29 @@
>                         };
>                 };
>  
> +               apps_rsc: rsc@18200000 {
> +                       label = "apps_rsc";
> +                       compatible = "qcom,rpmh-rsc";
> +                       reg = <0x18200000 0x10000>,
> +                             <0x18210000 0x10000>,
> +                             <0x18220000 0x10000>;
> +                       reg-names = "drv-0", "drv-1", "drv-2";
> +                       interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> +                       qcom,tcs-offset = <0xd00>;
> +                       qcom,drv-id = <2>;
> +                       qcom,tcs-config = <ACTIVE_TCS  2>,
> +                                         <SLEEP_TCS   1>,
> +                                         <WAKE_TCS    1>,
> +                                         <CONTROL_TCS 0>;
> +
> +                       rpmhcc: clock-controller {
> +                               compatible = "qcom,sm8150-rpmh-clk";
> +                               #clock-cells = <1>;

Should take some sort of clocks property to get the board clock for XO?

> +                       };
> +               };
> +
 

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 18/22] arm64: dts: qcom: sm8150: Add reserved-memory regions
  2019-08-14 12:50 ` [PATCH 18/22] arm64: dts: qcom: sm8150: Add reserved-memory regions Vinod Koul
@ 2019-08-14 17:13   ` Stephen Boyd
  2019-08-19 17:36     ` Vinod Koul
  0 siblings, 1 reply; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:13 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Vinod Koul, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-14 05:50:08)
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 5258b79676f6..7111e1f092f4 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -153,6 +153,117 @@
>                 method = "smc";
>         };
>  
> +       reserved_memory: reserved-memory {

Does this need a label?

> +               #address-cells = <2>;
> +               #size-cells = <2>;
> +               ranges;
> +
> +               hyp_mem: memory@85700000 {
> +                       reg = <0x0 0x85700000 0x0 0x600000>;
> +                       no-map;

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 20/22] arm64: dts: qcom: sm8150: Add pmu node to SM8150 SoC
  2019-08-14 12:50 ` [PATCH 20/22] arm64: dts: qcom: sm8150: Add pmu node to SM8150 SoC Vinod Koul
@ 2019-08-14 17:15   ` Stephen Boyd
  0 siblings, 0 replies; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:15 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Rob Herring, Mark Rutland,
	devicetree, linux-kernel, Vinod Koul

Quoting Vinod Koul (2019-08-14 05:50:10)
> From: Sibi Sankar <sibis@codeaurora.org>
> 
> Add the CPU PMU on SM8150 to get perf support for hardware events.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---

Squash it?


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 21/22] arm64: dts: qcom: sm8150: Add SMEM nodes
  2019-08-14 12:50 ` [PATCH 21/22] arm64: dts: qcom: sm8150: Add SMEM nodes Vinod Koul
@ 2019-08-14 17:16   ` Stephen Boyd
  0 siblings, 0 replies; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:16 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Rob Herring, Mark Rutland,
	devicetree, linux-kernel, Vinod Koul

Quoting Vinod Koul (2019-08-14 05:50:11)
> From: Sibi Sankar <sibis@codeaurora.org>
> 
> Add the necessary dt nodes to support SMEM on SM8150 SoC.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---

Squash it?


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 22/22] arm64: dts: qcom: sm8150: Add APSS shared mailbox
  2019-08-14 12:50 ` [PATCH 22/22] arm64: dts: qcom: sm8150: Add APSS shared mailbox Vinod Koul
@ 2019-08-14 17:17   ` Stephen Boyd
  2019-08-19 17:41     ` Vinod Koul
  0 siblings, 1 reply; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 17:17 UTC (permalink / raw)
  To: Andy Gross, Vinod Koul
  Cc: linux-arm-msm, Bjorn Andersson, sibis, Rob Herring, Mark Rutland,
	devicetree, linux-kernel, Vinod Koul

Quoting Vinod Koul (2019-08-14 05:50:12)
> @@ -338,6 +339,16 @@
>                         #interrupt-cells = <2>;
>                 };
>  
> +               aoss_qmp: qmp@c300000 {

Node name of 'clock-controller', or 'power-controller'?

> +                       compatible = "qcom,sm8150-aoss-qmp";
> +                       reg = <0x0c300000 0x100000>;
> +                       interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
> +                       mboxes = <&apss_shared 0>;

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 01/22] arm64: dts: qcom: sm8150: add base dts file
  2019-08-14 16:58   ` Stephen Boyd
@ 2019-08-14 17:44     ` Bjorn Andersson
  2019-08-14 18:35       ` Stephen Boyd
  0 siblings, 1 reply; 57+ messages in thread
From: Bjorn Andersson @ 2019-08-14 17:44 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: Andy Gross, Vinod Koul, linux-arm-msm, sibis, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

On Wed 14 Aug 09:58 PDT 2019, Stephen Boyd wrote:

> Quoting Vinod Koul (2019-08-14 05:49:51)
> > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
[..]
> > +       clocks {
> > +               xo_board: xo-board {
> > +                       compatible = "fixed-clock";
> > +                       #clock-cells = <0>;
> > +                       clock-frequency = <19200000>;
> 
> Is it 19.2 or 38.4 MHz? It seems like lately there are dividers, but I
> guess it doesn't really matter in the end.
> 

As with previous platforms, the board's XO feeds the PMIC at 38.4MHz and
the SoC's CXO_IN pin (i.e. bi_tcxo) is fed from the PMIC's LNBBCLK1,
which is ticking at 19.2MHz.

[..]
> > +               gcc: clock-controller@100000 {
> > +                       compatible = "qcom,gcc-sm8150";
> > +                       reg = <0x00100000 0x1f0000>;
> > +                       #clock-cells = <1>;
> > +                       #reset-cells = <1>;
> > +                       #power-domain-cells = <1>;
> > +                       clock-names = "bi_tcxo", "sleep_clk";
> > +                       clocks = <&xo_board>, <&sleep_clk>;

So this first one should actually be <&rpmhcc LNBBCLK1>.

But while we now should handle this gracefully in the clock driver I
think we still have problems with the cascading probe deferral that
follows - last time I tried to do this the serial driver probe deferred
past user space initialization and the system crashed as we didn't have
a /dev/console.


So, I think we should s/xo_board/lnbbclk1/ (at 19.2MHz) to make it
represent the schematics and then once we have rpmhcc and validated that
the system handles this gracefully we can switch it out.

Regards,
Bjorn

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 01/22] arm64: dts: qcom: sm8150: add base dts file
  2019-08-14 12:49 ` [PATCH 01/22] arm64: dts: qcom: sm8150: add base dts file Vinod Koul
  2019-08-14 16:58   ` Stephen Boyd
@ 2019-08-14 17:50   ` Bjorn Andersson
  1 sibling, 0 replies; 57+ messages in thread
From: Bjorn Andersson @ 2019-08-14 17:50 UTC (permalink / raw)
  To: Vinod Koul
  Cc: Andy Gross, linux-arm-msm, sibis, Rob Herring, Mark Rutland,
	Stephen Boyd, devicetree, linux-kernel

On Wed 14 Aug 05:49 PDT 2019, Vinod Koul wrote:
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
[..]
> +	soc: soc@0 {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0 0 0 0xffffffff>;

I'm expecting that we'll run into the same problems as we saw on 845
when bringing in the smmu nodes, so please make the cells 2 - and ranges
should likely be the same 36 bits.

Regards,
Bjorn

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 02/22] arm64: dts: qcom: sm8150-mtp: add base dts file
  2019-08-14 12:49 ` [PATCH 02/22] arm64: dts: qcom: sm8150-mtp: " Vinod Koul
@ 2019-08-14 17:53   ` Bjorn Andersson
  0 siblings, 0 replies; 57+ messages in thread
From: Bjorn Andersson @ 2019-08-14 17:53 UTC (permalink / raw)
  To: Vinod Koul
  Cc: Andy Gross, linux-arm-msm, sibis, Rob Herring, Mark Rutland,
	Stephen Boyd, devicetree, linux-kernel

On Wed 14 Aug 05:49 PDT 2019, Vinod Koul wrote:

> This add base DTS file for sm8150-mtp and enables
> boot to console
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---
>  arch/arm64/boot/dts/qcom/Makefile       |  1 +
>  arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 28 +++++++++++++++++++++++++
>  2 files changed, 29 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/sm8150-mtp.dts
> 
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 0a7e5dfce6f7..1964dacaf19b 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -12,5 +12,6 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-cheza-r2.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-cheza-r3.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-db845c.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-mtp.dtb
> +dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-mtp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
> new file mode 100644
> index 000000000000..df08ee50510d
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts
> @@ -0,0 +1,28 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +// Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> +// Copyright (c) 2019, Linaro Limited
> +
> +/dts-v1/;
> +
> +#include "sm8150.dtsi"
> +
> +/ {
> +	model = "Qualcomm Technologies, Inc. SM8150 MTP";
> +	compatible = "qcom,sm8150-mtp";
> +
> +	aliases {
> +		serial0 = &uart2;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +};
> +
> +&qupv3_id_1 {
> +	status = "okay";
> +};
> +
> +&uart2 {
> +	status = "okay";
> +};
> -- 
> 2.20.1
> 

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 10/22] arm64: dts: qcom: pm8150b: Add pon and adc nodes
  2019-08-14 12:50 ` [PATCH 10/22] arm64: dts: qcom: pm8150b: Add pon and adc nodes Vinod Koul
  2019-08-14 17:08   ` Stephen Boyd
@ 2019-08-14 18:00   ` Bjorn Andersson
  1 sibling, 0 replies; 57+ messages in thread
From: Bjorn Andersson @ 2019-08-14 18:00 UTC (permalink / raw)
  To: Vinod Koul
  Cc: Andy Gross, linux-arm-msm, sibis, Rob Herring, Mark Rutland,
	Stephen Boyd, devicetree, linux-kernel

On Wed 14 Aug 05:50 PDT 2019, Vinod Koul wrote:

> Add the pon and adc nodes found in pm8150b PMIC.
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
>  arch/arm64/boot/dts/qcom/pm8150b.dtsi | 54 +++++++++++++++++++++++++++
>  1 file changed, 54 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> index c0a678b0f159..846197bd65cd 100644
> --- a/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> +++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> @@ -2,6 +2,7 @@
>  // Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
>  // Copyright (c) 2019, Linaro Limited
>  
> +#include <dt-bindings/iio/qcom,spmi-vadc.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/spmi/spmi.h>
>  
> @@ -11,6 +12,59 @@
>  		reg = <0x2 SPMI_USID>;
>  		#address-cells = <1>;
>  		#size-cells = <0>;
> +
> +		pon@800 {
> +			compatible = "qcom,pm8916-pon";
> +			reg = <0x0800>;
> +		};
> +
> +		adc@3100 {
> +			compatible = "qcom,spmi-adc5";
> +			reg = <0x3100>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			#io-channel-cells = <1>;
> +			interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
> +
> +			ref-gnd@0 {
> +				reg = <ADC5_REF_GND>;
> +				qcom,pre-scaling = <1 1>;
> +				label = "ref_gnd";
> +			};
> +
> +			vref-1p25@1 {
> +				reg = <ADC5_1P25VREF>;
> +				qcom,pre-scaling = <1 1>;
> +				label = "vref_1p25";
> +			};
> +
> +			die-temp@6 {
> +				reg = <ADC5_DIE_TEMP>;
> +				qcom,pre-scaling = <1 1>;
> +				label = "die_temp";
> +			};
> +
> +			chg-temp@9 {
> +				reg = <ADC5_CHG_TEMP>;
> +				qcom,pre-scaling = <1 1>;
> +				label = "chg_temp";
> +			};
> +

I believe the above items are internal, so it makes sense to keep them
here, the below amux ones relates to board configuration so I think
those should go in the board file.

Regards,
Bjorn

> +			smb1390-therm@14 {
> +				reg = <ADC5_AMUX_THM2>;
> +				qcom,hw-settle-time = <200>;
> +				qcom,pre-scaling = <1 1>;
> +				label = "smb1390_therm";
> +			};
> +
> +			smb1355-therm@78 {
> +				reg = <ADC5_AMUX_THM2_100K_PU>;
> +				qcom,ratiometric;
> +				qcom,hw-settle-time = <200>;
> +				qcom,pre-scaling = <1 1>;
> +				label = "smb1355_therm";
> +			};
> +		};
>  	};
>  
>  	qcom,pm8150@3 {
> -- 
> 2.20.1
> 

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 01/22] arm64: dts: qcom: sm8150: add base dts file
  2019-08-14 17:44     ` Bjorn Andersson
@ 2019-08-14 18:35       ` Stephen Boyd
  2019-08-14 19:02         ` Bjorn Andersson
  0 siblings, 1 reply; 57+ messages in thread
From: Stephen Boyd @ 2019-08-14 18:35 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: Andy Gross, Vinod Koul, linux-arm-msm, sibis, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Bjorn Andersson (2019-08-14 10:44:39)
> On Wed 14 Aug 09:58 PDT 2019, Stephen Boyd wrote:
> 
> > Quoting Vinod Koul (2019-08-14 05:49:51)
> > > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> [..]
> > > +       clocks {
> > > +               xo_board: xo-board {
> > > +                       compatible = "fixed-clock";
> > > +                       #clock-cells = <0>;
> > > +                       clock-frequency = <19200000>;
> > 
> > Is it 19.2 or 38.4 MHz? It seems like lately there are dividers, but I
> > guess it doesn't really matter in the end.
> > 
> 
> As with previous platforms, the board's XO feeds the PMIC at 38.4MHz and
> the SoC's CXO_IN pin (i.e. bi_tcxo) is fed from the PMIC's LNBBCLK1,
> which is ticking at 19.2MHz.
> 
> [..]
> > > +               gcc: clock-controller@100000 {
> > > +                       compatible = "qcom,gcc-sm8150";
> > > +                       reg = <0x00100000 0x1f0000>;
> > > +                       #clock-cells = <1>;
> > > +                       #reset-cells = <1>;
> > > +                       #power-domain-cells = <1>;
> > > +                       clock-names = "bi_tcxo", "sleep_clk";
> > > +                       clocks = <&xo_board>, <&sleep_clk>;
> 
> So this first one should actually be <&rpmhcc LNBBCLK1>.

Hrmm LNBBCLK1 doesn't make any sense to me. That's a buffer that is
technically the net connected to the XO pin on the Soc, but it isn't
really supposed to be used by anything from what I recall. Last time I
tried to use the buffers the RPM team told me I was using the wrong
resource and I should just use the XO resource instead. Doesn't RPMh
expose the other "XO" resource that is supposed to prevent XO shutdown?
Just mark it critical for now so that XO isn't turned off at runtime.

> 
> But while we now should handle this gracefully in the clock driver I
> think we still have problems with the cascading probe deferral that
> follows - last time I tried to do this the serial driver probe deferred
> past user space initialization and the system crashed as we didn't have
> a /dev/console.

Does the serial driver probe eventually? Maybe you can run agetty when
the device appears based on some uevent for /dev/console. Or we have a
bug where /dev/console is created by devtmpfs when there isn't actually
a console?

> 
> 
> So, I think we should s/xo_board/lnbbclk1/ (at 19.2MHz) to make it
> represent the schematics and then once we have rpmhcc and validated that
> the system handles this gracefully we can switch it out.
> 

Sure, some sort of approach that switches it later on is fine, just want
to make sure that the board clk frequency is accurately reflected in the
DT.


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 01/22] arm64: dts: qcom: sm8150: add base dts file
  2019-08-14 18:35       ` Stephen Boyd
@ 2019-08-14 19:02         ` Bjorn Andersson
  0 siblings, 0 replies; 57+ messages in thread
From: Bjorn Andersson @ 2019-08-14 19:02 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: Andy Gross, Vinod Koul, linux-arm-msm, sibis, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

On Wed 14 Aug 11:35 PDT 2019, Stephen Boyd wrote:

> Quoting Bjorn Andersson (2019-08-14 10:44:39)
> > On Wed 14 Aug 09:58 PDT 2019, Stephen Boyd wrote:
> > 
> > > Quoting Vinod Koul (2019-08-14 05:49:51)
> > > > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > [..]
> > > > +       clocks {
> > > > +               xo_board: xo-board {
> > > > +                       compatible = "fixed-clock";
> > > > +                       #clock-cells = <0>;
> > > > +                       clock-frequency = <19200000>;
> > > 
> > > Is it 19.2 or 38.4 MHz? It seems like lately there are dividers, but I
> > > guess it doesn't really matter in the end.
> > > 
> > 
> > As with previous platforms, the board's XO feeds the PMIC at 38.4MHz and
> > the SoC's CXO_IN pin (i.e. bi_tcxo) is fed from the PMIC's LNBBCLK1,
> > which is ticking at 19.2MHz.
> > 
> > [..]
> > > > +               gcc: clock-controller@100000 {
> > > > +                       compatible = "qcom,gcc-sm8150";
> > > > +                       reg = <0x00100000 0x1f0000>;
> > > > +                       #clock-cells = <1>;
> > > > +                       #reset-cells = <1>;
> > > > +                       #power-domain-cells = <1>;
> > > > +                       clock-names = "bi_tcxo", "sleep_clk";
> > > > +                       clocks = <&xo_board>, <&sleep_clk>;
> > 
> > So this first one should actually be <&rpmhcc LNBBCLK1>.
> 
> Hrmm LNBBCLK1 doesn't make any sense to me. That's a buffer that is
> technically the net connected to the XO pin on the Soc, but it isn't
> really supposed to be used by anything from what I recall. Last time I
> tried to use the buffers the RPM team told me I was using the wrong
> resource and I should just use the XO resource instead. Doesn't RPMh
> expose the other "XO" resource that is supposed to prevent XO shutdown?

So while it's the LNBBCLK1 pin we're referring to, it's the RPMH_CXO_CLK
which has some level of magic involved that we should actually use in
the software.

> Just mark it critical for now so that XO isn't turned off at runtime.
> 
> > 
> > But while we now should handle this gracefully in the clock driver I
> > think we still have problems with the cascading probe deferral that
> > follows - last time I tried to do this the serial driver probe deferred
> > past user space initialization and the system crashed as we didn't have
> > a /dev/console.
> 
> Does the serial driver probe eventually? Maybe you can run agetty when
> the device appears based on some uevent for /dev/console. Or we have a
> bug where /dev/console is created by devtmpfs when there isn't actually
> a console?
> 

I don't remember the exact outcome, but presume it would depend on the
implementation details of early user space (e.g. my regression test
suite would not deal with this).

> > 
> > 
> > So, I think we should s/xo_board/lnbbclk1/ (at 19.2MHz) to make it
> > represent the schematics and then once we have rpmhcc and validated that
> > the system handles this gracefully we can switch it out.
> > 
> 
> Sure, some sort of approach that switches it later on is fine, just want
> to make sure that the board clk frequency is accurately reflected in the
> DT.
> 

We introduced the xo_board fixed clock to have a parent of gcc, but
given that there is a clock named "XO" and it is not the clock being
connected to gcc, nor is it ticking at the right frequency I think it
should at least have a different name.

Regards,
Bjorn

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 03/22] arm64: dts: qcom: sm8150: add tlmm node
  2019-08-14 17:01   ` Stephen Boyd
@ 2019-08-19 17:09     ` Vinod Koul
  0 siblings, 0 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-19 17:09 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: Andy Gross, linux-arm-msm, Bjorn Andersson, sibis, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

On 14-08-19, 10:01, Stephen Boyd wrote:
> Quoting Vinod Koul (2019-08-14 05:49:53)
> > Signed-off-by: Vinod Koul <vkoul@kernel.org>
> > ---
> 
> Add some commit text? Or just squash with the first patch? Not sure why
> it's a different commit.
> 
> >  arch/arm64/boot/dts/qcom/sm8150.dtsi | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > index cd9fcadaeacb..5f2f21270e2d 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > @@ -189,6 +189,21 @@
> >                         };
> >                 };
> >  
> > +               tlmm: pinctrl@3100000 {
> > +                       compatible = "qcom,sm8150-pinctrl";
> > +                       reg = <0x03100000 0x300000>,
> > +                             <0x03500000 0x300000>,
> > +                             <0x03900000 0x300000>,
> > +                             <0x03D00000 0x300000>;
> 
> Please don't use capitalized hex characters.

Sure, this seems to be only instance where this crept in. Fixed now

-- 
~Vinod

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 06/22] arm64: dts: qcom: pm8150: Add Base DTS file
  2019-08-14 17:03   ` Stephen Boyd
@ 2019-08-19 17:28     ` Vinod Koul
  0 siblings, 0 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-19 17:28 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: Andy Gross, linux-arm-msm, Bjorn Andersson, sibis, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

On 14-08-19, 10:03, Stephen Boyd wrote:
> Quoting Vinod Koul (2019-08-14 05:49:56)
> > Add base DTS file for pm8150 along with GPIOs
> > 
> > Signed-off-by: Vinod Koul <vkoul@kernel.org>
> > ---
> >  arch/arm64/boot/dts/qcom/pm8150.dtsi | 41 ++++++++++++++++++++++++++++
> >  1 file changed, 41 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/qcom/pm8150.dtsi
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi
> > new file mode 100644
> > index 000000000000..b533e254a203
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi
> > @@ -0,0 +1,41 @@
> > +// SPDX-License-Identifier: BSD-3-Clause
> > +// Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> > +// Copyright (c) 2019, Linaro Limited
> > +
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +#include <dt-bindings/spmi/spmi.h>
> > +
> > +&spmi_bus {
> > +       pm8150_0: pm8150@0 {
> 
> I think node name should be 'pmic'

Yes will fix.
> 
> > +               compatible = "qcom,spmi-pmic";
> 
> This should also have the model number? "qcom,pm8150"?

Added now

> > +               reg = <0x0 SPMI_USID>;
> > +               #address-cells = <1>;
> > +               #size-cells = <0>;
> > +
> > +               pm8150_gpios: gpio@c000 {
> > +                       compatible = "qcom,pm8150-gpio";
> > +                       reg = <0xc000>;
> > +                       gpio-controller;
> > +                       #gpio-cells = <2>;
> > +                       interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
> > +                                    <0 0xc1 0 IRQ_TYPE_NONE>,
> > +                                    <0 0xc2 0 IRQ_TYPE_NONE>,
> > +                                    <0 0xc3 0 IRQ_TYPE_NONE>,
> > +                                    <0 0xc4 0 IRQ_TYPE_NONE>,
> > +                                    <0 0xc5 0 IRQ_TYPE_NONE>,
> > +                                    <0 0xc6 0 IRQ_TYPE_NONE>,
> > +                                    <0 0xc7 0 IRQ_TYPE_NONE>,
> > +                                    <0 0xc8 0 IRQ_TYPE_NONE>,
> > +                                    <0 0xc9 0 IRQ_TYPE_NONE>,
> > +                                    <0 0xca 0 IRQ_TYPE_NONE>,
> > +                                    <0 0xcb 0 IRQ_TYPE_NONE>;
> > +               };
> > +       };
> > +
> > +       qcom,pm8150@1 {
> 
> Same comment, pmic@1.

right, here and everywhere else

-- 
~Vinod

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 07/22] arm64: dts: qcom: pm8150: Add pon and rtc nodes
  2019-08-14 17:03   ` Stephen Boyd
@ 2019-08-19 17:32     ` Vinod Koul
  0 siblings, 0 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-19 17:32 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: Andy Gross, linux-arm-msm, Bjorn Andersson, sibis, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

On 14-08-19, 10:03, Stephen Boyd wrote:
> Quoting Vinod Koul (2019-08-14 05:49:57)
> > PM8150 PMIC contains pon and rtc devices so add nodes for these.
> > 
> > Signed-off-by: Vinod Koul <vkoul@kernel.org>
> > ---
> 
> Squash this with the other patch?

OK

> 
> > @@ -12,6 +13,25 @@
> >                 #address-cells = <1>;
> >                 #size-cells = <0>;
> >  
> > +               pon: pon@800 {
> > +                       compatible = "qcom,pm8916-pon";
> > +                       reg = <0x0800>;
> > +                       pwrkey {
> > +                               compatible = "qcom,pm8941-pwrkey";
> > +                               interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
> > +                               debounce = <15625>;
> > +                               bias-pull-up;
> > +                               linux,code = <KEY_POWER>;
> 
> status = "disabled"?

will do

> 
> > +                       };
> > +               };
> > +
> > +               rtc@6000 {
> > +                       compatible = "qcom,pm8941-rtc";
> > +                       reg = <0x6000>;
> > +                       reg-names = "rtc", "alarm";
> > +                       interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
> 
> status = "disabled"?

will do

-- 
~Vinod

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 17/22] arm64: dts: qcom: sm8150: Add apss_shared and apps_rsc nodes
  2019-08-14 17:12   ` Stephen Boyd
@ 2019-08-19 17:35     ` Vinod Koul
  0 siblings, 0 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-19 17:35 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: Andy Gross, linux-arm-msm, Bjorn Andersson, sibis, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

On 14-08-19, 10:12, Stephen Boyd wrote:
> Quoting Vinod Koul (2019-08-14 05:50:07)
> > Add apss_shared and apps_rsc node including the rpmhcc child node
> > 
> > Signed-off-by: Vinod Koul <vkoul@kernel.org>
> > ---
> 
> Can't this be squashed with the original dtsi file?

That makes it a huge blob, imo hard to review. I will still go ahead and
squash things in v2, but will still keep logical chunks.. (this can go
in original though)

> 
> >  arch/arm64/boot/dts/qcom/sm8150.dtsi | 30 ++++++++++++++++++++++++++++
> >  1 file changed, 30 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > index 5c6b103b042b..5258b79676f6 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > @@ -4,6 +4,7 @@
> >  
> >  #include <dt-bindings/interrupt-controller/arm-gic.h>
> >  #include <dt-bindings/clock/qcom,gcc-sm8150.h>
> > +#include <dt-bindings/soc/qcom,rpmh-rsc.h>
> 
> But not the rpmh clk bindings?

Thats missing will add

> 
> > @@ -272,6 +279,29 @@
> >                         };
> >                 };
> >  
> > +               apps_rsc: rsc@18200000 {
> > +                       label = "apps_rsc";
> > +                       compatible = "qcom,rpmh-rsc";
> > +                       reg = <0x18200000 0x10000>,
> > +                             <0x18210000 0x10000>,
> > +                             <0x18220000 0x10000>;
> > +                       reg-names = "drv-0", "drv-1", "drv-2";
> > +                       interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> > +                                    <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> > +                                    <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> > +                       qcom,tcs-offset = <0xd00>;
> > +                       qcom,drv-id = <2>;
> > +                       qcom,tcs-config = <ACTIVE_TCS  2>,
> > +                                         <SLEEP_TCS   1>,
> > +                                         <WAKE_TCS    1>,
> > +                                         <CONTROL_TCS 0>;
> > +
> > +                       rpmhcc: clock-controller {
> > +                               compatible = "qcom,sm8150-rpmh-clk";
> > +                               #clock-cells = <1>;
> 
> Should take some sort of clocks property to get the board clock for XO?

Yes after conversion, I have updated this now

-- 
~Vinod

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 18/22] arm64: dts: qcom: sm8150: Add reserved-memory regions
  2019-08-14 17:13   ` Stephen Boyd
@ 2019-08-19 17:36     ` Vinod Koul
  0 siblings, 0 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-19 17:36 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: Andy Gross, linux-arm-msm, Bjorn Andersson, sibis, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

On 14-08-19, 10:13, Stephen Boyd wrote:
> Quoting Vinod Koul (2019-08-14 05:50:08)
> > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > index 5258b79676f6..7111e1f092f4 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > @@ -153,6 +153,117 @@
> >                 method = "smc";
> >         };
> >  
> > +       reserved_memory: reserved-memory {
> 
> Does this need a label?

will remove

> 
> > +               #address-cells = <2>;
> > +               #size-cells = <2>;
> > +               ranges;
> > +
> > +               hyp_mem: memory@85700000 {
> > +                       reg = <0x0 0x85700000 0x0 0x600000>;
> > +                       no-map;

-- 
~Vinod

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 22/22] arm64: dts: qcom: sm8150: Add APSS shared mailbox
  2019-08-14 17:17   ` Stephen Boyd
@ 2019-08-19 17:41     ` Vinod Koul
  2019-08-20  6:20       ` Sibi Sankar
  0 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-19 17:41 UTC (permalink / raw)
  To: Stephen Boyd, Bjorn Andersson
  Cc: Andy Gross, linux-arm-msm, sibis, Rob Herring, Mark Rutland,
	devicetree, linux-kernel

On 14-08-19, 10:17, Stephen Boyd wrote:
> Quoting Vinod Koul (2019-08-14 05:50:12)
> > @@ -338,6 +339,16 @@
> >                         #interrupt-cells = <2>;
> >                 };
> >  
> > +               aoss_qmp: qmp@c300000 {
> 
> Node name of 'clock-controller', or 'power-controller'?

The orignal entry for sdm845 has no such statement, but yes it doesn
makes sense. I am thinking power-controller.. Bjorn?

-- 
~Vinod

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 10/22] arm64: dts: qcom: pm8150b: Add pon and adc nodes
  2019-08-14 17:08   ` Stephen Boyd
@ 2019-08-19 17:43     ` Vinod Koul
  2019-08-19 17:56       ` Stephen Boyd
  0 siblings, 1 reply; 57+ messages in thread
From: Vinod Koul @ 2019-08-19 17:43 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: Andy Gross, linux-arm-msm, Bjorn Andersson, sibis, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

On 14-08-19, 10:08, Stephen Boyd wrote:
> Quoting Vinod Koul (2019-08-14 05:50:00)
> > Add the pon and adc nodes found in pm8150b PMIC.
> > 
> > Signed-off-by: Vinod Koul <vkoul@kernel.org>
> > ---
> >  arch/arm64/boot/dts/qcom/pm8150b.dtsi | 54 +++++++++++++++++++++++++++
> >  1 file changed, 54 insertions(+)
> 
> Squash?

Ok

> 
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> > index c0a678b0f159..846197bd65cd 100644
> > --- a/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> > @@ -2,6 +2,7 @@
> >  // Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> >  // Copyright (c) 2019, Linaro Limited
> >  
> > +#include <dt-bindings/iio/qcom,spmi-vadc.h>
> >  #include <dt-bindings/interrupt-controller/irq.h>
> >  #include <dt-bindings/spmi/spmi.h>
> >  
> > @@ -11,6 +12,59 @@
> >                 reg = <0x2 SPMI_USID>;
> >                 #address-cells = <1>;
> >                 #size-cells = <0>;
> > +
> > +               pon@800 {
> 
> Maybe pon node name should be 'key' or 'power-on'?

pon stands for power on device. See Documentation/devicetree/bindings/power/reset/qcom,pon.txt

> 
> > +                       compatible = "qcom,pm8916-pon";
> > +                       reg = <0x0800>;
> > +               };
> > +
> > +               adc@3100 {
> > +                       compatible = "qcom,spmi-adc5";
> > +                       reg = <0x3100>;
> > +                       #address-cells = <1>;
> > +                       #size-cells = <0>;
> > +                       #io-channel-cells = <1>;
> > +                       interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
> > +
> > +                       ref-gnd@0 {
> > +                               reg = <ADC5_REF_GND>;
> > +                               qcom,pre-scaling = <1 1>;
> > +                               label = "ref_gnd";
> > +                       };
> > +
> > +                       vref-1p25@1 {
> > +                               reg = <ADC5_1P25VREF>;
> > +                               qcom,pre-scaling = <1 1>;
> > +                               label = "vref_1p25";
> > +                       };
> > +
> > +                       die-temp@6 {
> > +                               reg = <ADC5_DIE_TEMP>;
> > +                               qcom,pre-scaling = <1 1>;
> > +                               label = "die_temp";
> > +                       };
> > +
> > +                       chg-temp@9 {
> > +                               reg = <ADC5_CHG_TEMP>;
> > +                               qcom,pre-scaling = <1 1>;
> > +                               label = "chg_temp";
> > +                       };
> > +
> > +                       smb1390-therm@14 {
> > +                               reg = <ADC5_AMUX_THM2>;
> > +                               qcom,hw-settle-time = <200>;
> > +                               qcom,pre-scaling = <1 1>;
> > +                               label = "smb1390_therm";
> > +                       };
> > +
> > +                       smb1355-therm@78 {
> > +                               reg = <ADC5_AMUX_THM2_100K_PU>;
> > +                               qcom,ratiometric;
> > +                               qcom,hw-settle-time = <200>;
> > +                               qcom,pre-scaling = <1 1>;
> > +                               label = "smb1355_therm";
> > +                       };
> 
> Again, are these board level details? Maybe should be provided here with
> status = "disabled" and then added by the boards that use these ADCs.

Sure I will update these

-- 
~Vinod

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 10/22] arm64: dts: qcom: pm8150b: Add pon and adc nodes
  2019-08-19 17:43     ` Vinod Koul
@ 2019-08-19 17:56       ` Stephen Boyd
  2019-08-20  3:46         ` Vinod Koul
  0 siblings, 1 reply; 57+ messages in thread
From: Stephen Boyd @ 2019-08-19 17:56 UTC (permalink / raw)
  To: Vinod Koul
  Cc: Andy Gross, linux-arm-msm, Bjorn Andersson, sibis, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

Quoting Vinod Koul (2019-08-19 10:43:31)
> On 14-08-19, 10:08, Stephen Boyd wrote:
> > 
> > > 
> > > diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> > > index c0a678b0f159..846197bd65cd 100644
> > > --- a/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> > > @@ -2,6 +2,7 @@
> > >  // Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> > >  // Copyright (c) 2019, Linaro Limited
> > >  
> > > +#include <dt-bindings/iio/qcom,spmi-vadc.h>
> > >  #include <dt-bindings/interrupt-controller/irq.h>
> > >  #include <dt-bindings/spmi/spmi.h>
> > >  
> > > @@ -11,6 +12,59 @@
> > >                 reg = <0x2 SPMI_USID>;
> > >                 #address-cells = <1>;
> > >                 #size-cells = <0>;
> > > +
> > > +               pon@800 {
> > 
> > Maybe pon node name should be 'key' or 'power-on'?
> 
> pon stands for power on device. See Documentation/devicetree/bindings/power/reset/qcom,pon.txt
> 

Right. I was hoping for a more standard node name vs. an acronym that's
SoC specific.


^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 10/22] arm64: dts: qcom: pm8150b: Add pon and adc nodes
  2019-08-19 17:56       ` Stephen Boyd
@ 2019-08-20  3:46         ` Vinod Koul
  0 siblings, 0 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-20  3:46 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: Andy Gross, linux-arm-msm, Bjorn Andersson, sibis, Rob Herring,
	Mark Rutland, devicetree, linux-kernel

On 19-08-19, 10:56, Stephen Boyd wrote:
> Quoting Vinod Koul (2019-08-19 10:43:31)
> > On 14-08-19, 10:08, Stephen Boyd wrote:
> > > 
> > > > 
> > > > diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> > > > index c0a678b0f159..846197bd65cd 100644
> > > > --- a/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> > > > +++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
> > > > @@ -2,6 +2,7 @@
> > > >  // Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> > > >  // Copyright (c) 2019, Linaro Limited
> > > >  
> > > > +#include <dt-bindings/iio/qcom,spmi-vadc.h>
> > > >  #include <dt-bindings/interrupt-controller/irq.h>
> > > >  #include <dt-bindings/spmi/spmi.h>
> > > >  
> > > > @@ -11,6 +12,59 @@
> > > >                 reg = <0x2 SPMI_USID>;
> > > >                 #address-cells = <1>;
> > > >                 #size-cells = <0>;
> > > > +
> > > > +               pon@800 {
> > > 
> > > Maybe pon node name should be 'key' or 'power-on'?
> > 
> > pon stands for power on device. See Documentation/devicetree/bindings/power/reset/qcom,pon.txt
> 
> Right. I was hoping for a more standard node name vs. an acronym that's
> SoC specific.

Sure that sounds better to me, I will make it "power-on"

-- 
~Vinod

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 22/22] arm64: dts: qcom: sm8150: Add APSS shared mailbox
  2019-08-19 17:41     ` Vinod Koul
@ 2019-08-20  6:20       ` Sibi Sankar
  2019-08-20  6:37         ` Vinod Koul
  0 siblings, 1 reply; 57+ messages in thread
From: Sibi Sankar @ 2019-08-20  6:20 UTC (permalink / raw)
  To: Vinod Koul
  Cc: Stephen Boyd, Bjorn Andersson, Andy Gross, linux-arm-msm,
	Rob Herring, Mark Rutland, devicetree, linux-kernel

Hey Vinod,

There seems to be a mismatch
between the commit description
and the dt node (This is the
aoss qmp node not the APPS
shared node).


On 2019-08-19 23:11, Vinod Koul wrote:
> On 14-08-19, 10:17, Stephen Boyd wrote:
>> Quoting Vinod Koul (2019-08-14 05:50:12)
>> > @@ -338,6 +339,16 @@
>> >                         #interrupt-cells = <2>;
>> >                 };
>> >
>> > +               aoss_qmp: qmp@c300000 {
>> 
>> Node name of 'clock-controller', or 'power-controller'?
> 
> The orignal entry for sdm845 has no such statement, but yes it doesn
> makes sense. I am thinking power-controller.. Bjorn?

aoss_qmp registers both pd and
clock providers.

-- 
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[flat|nested] 57+ messages in thread

* Re: [PATCH 22/22] arm64: dts: qcom: sm8150: Add APSS shared mailbox
  2019-08-20  6:20       ` Sibi Sankar
@ 2019-08-20  6:37         ` Vinod Koul
  0 siblings, 0 replies; 57+ messages in thread
From: Vinod Koul @ 2019-08-20  6:37 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: Stephen Boyd, Bjorn Andersson, Andy Gross, linux-arm-msm,
	Rob Herring, Mark Rutland, devicetree, linux-kernel

On 20-08-19, 11:50, Sibi Sankar wrote:
> Hey Vinod,
> 
> There seems to be a mismatch
> between the commit description
> and the dt node (This is the
> aoss qmp node not the APPS
> shared node).

Thanks for pointing, I have squashed this and other into single patch
and updated the description

> 
> 
> On 2019-08-19 23:11, Vinod Koul wrote:
> > On 14-08-19, 10:17, Stephen Boyd wrote:
> > > Quoting Vinod Koul (2019-08-14 05:50:12)
> > > > @@ -338,6 +339,16 @@
> > > >                         #interrupt-cells = <2>;
> > > >                 };
> > > >
> > > > +               aoss_qmp: qmp@c300000 {
> > > 
> > > Node name of 'clock-controller', or 'power-controller'?
> > 
> > The orignal entry for sdm845 has no such statement, but yes it doesn
> > makes sense. I am thinking power-controller.. Bjorn?
> 
> aoss_qmp registers both pd and
> clock providers.

Thats correct, I chatted with Bjorn and he recommended we use power-controller

-- 
~Vinod

^ permalink raw reply	[flat|nested] 57+ messages in thread

end of thread, back to index

Thread overview: 57+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-14 12:49 [PATCH 00/22] arm64: dts: qcom: sm8150: Add SM8150 DTS Vinod Koul
2019-08-14 12:49 ` [PATCH 01/22] arm64: dts: qcom: sm8150: add base dts file Vinod Koul
2019-08-14 16:58   ` Stephen Boyd
2019-08-14 17:44     ` Bjorn Andersson
2019-08-14 18:35       ` Stephen Boyd
2019-08-14 19:02         ` Bjorn Andersson
2019-08-14 17:50   ` Bjorn Andersson
2019-08-14 12:49 ` [PATCH 02/22] arm64: dts: qcom: sm8150-mtp: " Vinod Koul
2019-08-14 17:53   ` Bjorn Andersson
2019-08-14 12:49 ` [PATCH 03/22] arm64: dts: qcom: sm8150: add tlmm node Vinod Koul
2019-08-14 17:01   ` Stephen Boyd
2019-08-19 17:09     ` Vinod Koul
2019-08-14 12:49 ` [PATCH 04/22] arm64: dts: qcom: sm8150-mtp: add tlmm reserved range Vinod Koul
2019-08-14 17:01   ` Stephen Boyd
2019-08-14 12:49 ` [PATCH 05/22] arm64: dts: qcom: sm8150: Add spmi node Vinod Koul
2019-08-14 17:01   ` Stephen Boyd
2019-08-14 12:49 ` [PATCH 06/22] arm64: dts: qcom: pm8150: Add Base DTS file Vinod Koul
2019-08-14 17:03   ` Stephen Boyd
2019-08-19 17:28     ` Vinod Koul
2019-08-14 12:49 ` [PATCH 07/22] arm64: dts: qcom: pm8150: Add pon and rtc nodes Vinod Koul
2019-08-14 17:03   ` Stephen Boyd
2019-08-19 17:32     ` Vinod Koul
2019-08-14 12:49 ` [PATCH 08/22] arm64: dts: qcom: pm8150: Add vadc node Vinod Koul
2019-08-14 17:05   ` Stephen Boyd
2019-08-14 12:49 ` [PATCH 09/22] arm64: dts: qcom: pm8150b: Add Base DTS file Vinod Koul
2019-08-14 17:05   ` Stephen Boyd
2019-08-14 12:50 ` [PATCH 10/22] arm64: dts: qcom: pm8150b: Add pon and adc nodes Vinod Koul
2019-08-14 17:08   ` Stephen Boyd
2019-08-19 17:43     ` Vinod Koul
2019-08-19 17:56       ` Stephen Boyd
2019-08-20  3:46         ` Vinod Koul
2019-08-14 18:00   ` Bjorn Andersson
2019-08-14 12:50 ` [PATCH 11/22] arm64: dts: qcom: pm8150b: Add gpio node Vinod Koul
2019-08-14 17:08   ` Stephen Boyd
2019-08-14 12:50 ` [PATCH 12/22] arm64: dts: qcom: pm8150l: Add Base DTS file Vinod Koul
2019-08-14 17:10   ` Stephen Boyd
2019-08-14 12:50 ` [PATCH 13/22] arm64: dts: qcom: pm8150l: Add pon and adc nodes Vinod Koul
2019-08-14 17:10   ` Stephen Boyd
2019-08-14 12:50 ` [PATCH 14/22] arm64: dts: qcom: pm8150l: Add gpio node Vinod Koul
2019-08-14 12:50 ` [PATCH 15/22] arm64: dts: qcom: sm8150-mtp: Include pmics Vinod Koul
2019-08-14 12:50 ` [PATCH 16/22] arm64: dts: qcom: sm8150-mtp: Add resin node Vinod Koul
2019-08-14 12:50 ` [PATCH 17/22] arm64: dts: qcom: sm8150: Add apss_shared and apps_rsc nodes Vinod Koul
2019-08-14 17:12   ` Stephen Boyd
2019-08-19 17:35     ` Vinod Koul
2019-08-14 12:50 ` [PATCH 18/22] arm64: dts: qcom: sm8150: Add reserved-memory regions Vinod Koul
2019-08-14 17:13   ` Stephen Boyd
2019-08-19 17:36     ` Vinod Koul
2019-08-14 12:50 ` [PATCH 19/22] arm64: dts: qcom: sm8150-mtp: Add regulators Vinod Koul
2019-08-14 12:50 ` [PATCH 20/22] arm64: dts: qcom: sm8150: Add pmu node to SM8150 SoC Vinod Koul
2019-08-14 17:15   ` Stephen Boyd
2019-08-14 12:50 ` [PATCH 21/22] arm64: dts: qcom: sm8150: Add SMEM nodes Vinod Koul
2019-08-14 17:16   ` Stephen Boyd
2019-08-14 12:50 ` [PATCH 22/22] arm64: dts: qcom: sm8150: Add APSS shared mailbox Vinod Koul
2019-08-14 17:17   ` Stephen Boyd
2019-08-19 17:41     ` Vinod Koul
2019-08-20  6:20       ` Sibi Sankar
2019-08-20  6:37         ` Vinod Koul

LKML Archive on lore.kernel.org

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