* [PATCH v2] mfd: intel-lpss: Consistently use GENMASK()
@ 2019-08-16 17:33 Andy Shevchenko
2019-09-02 8:56 ` Lee Jones
0 siblings, 1 reply; 2+ messages in thread
From: Andy Shevchenko @ 2019-08-16 17:33 UTC (permalink / raw)
To: Lee Jones, linux-kernel; +Cc: Andy Shevchenko
Since we already are using BIT() macro, use GENMASK() as well for sake of
consistency.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
v2: drop extra shift, move line closer to other bit definitions
drivers/mfd/intel-lpss.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/mfd/intel-lpss.c b/drivers/mfd/intel-lpss.c
index 277f48f1cc1c..3e16a1765142 100644
--- a/drivers/mfd/intel-lpss.c
+++ b/drivers/mfd/intel-lpss.c
@@ -47,10 +47,10 @@
#define LPSS_PRIV_IDLELTR 0x14
#define LPSS_PRIV_LTR_REQ BIT(15)
-#define LPSS_PRIV_LTR_SCALE_MASK 0xc00
-#define LPSS_PRIV_LTR_SCALE_1US 0x800
-#define LPSS_PRIV_LTR_SCALE_32US 0xc00
-#define LPSS_PRIV_LTR_VALUE_MASK 0x3ff
+#define LPSS_PRIV_LTR_SCALE_MASK GENMASK(11, 10)
+#define LPSS_PRIV_LTR_SCALE_1US (2 << 10)
+#define LPSS_PRIV_LTR_SCALE_32US (3 << 10)
+#define LPSS_PRIV_LTR_VALUE_MASK GENMASK(9, 0)
#define LPSS_PRIV_SSP_REG 0x20
#define LPSS_PRIV_SSP_REG_DIS_DMA_FIN BIT(0)
@@ -59,8 +59,8 @@
#define LPSS_PRIV_CAPS 0xfc
#define LPSS_PRIV_CAPS_NO_IDMA BIT(8)
+#define LPSS_PRIV_CAPS_TYPE_MASK GENMASK(7, 4)
#define LPSS_PRIV_CAPS_TYPE_SHIFT 4
-#define LPSS_PRIV_CAPS_TYPE_MASK (0xf << LPSS_PRIV_CAPS_TYPE_SHIFT)
/* This matches the type field in CAPS register */
enum intel_lpss_dev_type {
--
2.23.0.rc1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] mfd: intel-lpss: Consistently use GENMASK()
2019-08-16 17:33 [PATCH v2] mfd: intel-lpss: Consistently use GENMASK() Andy Shevchenko
@ 2019-09-02 8:56 ` Lee Jones
0 siblings, 0 replies; 2+ messages in thread
From: Lee Jones @ 2019-09-02 8:56 UTC (permalink / raw)
To: Andy Shevchenko; +Cc: linux-kernel
On Fri, 16 Aug 2019, Andy Shevchenko wrote:
> Since we already are using BIT() macro, use GENMASK() as well for sake of
> consistency.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
> v2: drop extra shift, move line closer to other bit definitions
> drivers/mfd/intel-lpss.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
Applied, thanks.
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2019-09-02 8:56 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-16 17:33 [PATCH v2] mfd: intel-lpss: Consistently use GENMASK() Andy Shevchenko
2019-09-02 8:56 ` Lee Jones
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).