* Re: memory-barriers.txt questions
[not found] <CAJ+HfNiC3jEuP39-a5PoQuY=Vi-CeQJ6STSLKZZRqSRND4Fcyw@mail.gmail.com>
@ 2019-08-21 14:38 ` Paul E. McKenney
0 siblings, 0 replies; only message in thread
From: Paul E. McKenney @ 2019-08-21 14:38 UTC (permalink / raw)
To: Björn Töpel; +Cc: linux-kernel
On Wed, Aug 21, 2019 at 04:24:42PM +0200, Björn Töpel wrote:
> Paul,
>
> Reaching out directly, hope that's OK!
Adding LKML on CC, hope that's OK!
> >From memory-barriers.txt (what an excellent document. I've read it
> over and over, and never get all the details. :-)):
> --8<--
> MISCELLANEOUS FUNCTIONS
> -----------------------
>
> Other functions that imply barriers:
>
> (*) schedule() and similar imply full memory barriers.
> -->8--
>
> The "and similar" part puzzles me. IPI is a a full barrier on all
> platforms (I think). Are interrupts in general full barriers? What
> more?
Functions similar to schedule() include schedule_user(),
schedule_preempt_disabled(), preempt_schedule(), preempt_schedule_irq(),
and so on. Plus any function that calls one of these functions.
Interrupts are quite architecture specific, and on many architectures an
interrupt does not imply any sort of cross-CPU ordering in and of itself.
So you would need to inspect the interrupt-entry/-exit code to see if
the needed full memory-barrier instructions were in place to answer
this question.
But what are you trying to achieve?
Thanx, Paul
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2019-08-21 14:38 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
[not found] <CAJ+HfNiC3jEuP39-a5PoQuY=Vi-CeQJ6STSLKZZRqSRND4Fcyw@mail.gmail.com>
2019-08-21 14:38 ` memory-barriers.txt questions Paul E. McKenney
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).