From: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
To: jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org,
agross@kernel.org, mturquette@baylibre.com
Cc: bjorn.andersson@linaro.org, niklas.cassel@linaro.org,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 4/5] clk: qcom: hfpll: register as clock provider
Date: Mon, 26 Aug 2019 18:45:09 +0200 [thread overview]
Message-ID: <20190826164510.6425-4-jorge.ramirez-ortiz@linaro.org> (raw)
In-Reply-To: <20190826164510.6425-1-jorge.ramirez-ortiz@linaro.org>
Make the output of the high frequency pll a clock provider.
On the QCS404 this PLL controls cpu frequency scaling.
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/qcom/hfpll.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index 87b7f46d27e0..0ffed0d41c50 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -53,6 +53,7 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
struct regmap *regmap;
struct clk_hfpll *h;
struct clk *pclk;
+ int ret;
struct clk_init_data init = {
.parent_names = (const char *[]){ "xo" },
.num_parents = 1,
@@ -87,7 +88,14 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
h->clkr.hw.init = &init;
spin_lock_init(&h->lock);
- return devm_clk_register_regmap(&pdev->dev, &h->clkr);
+ ret = devm_clk_register_regmap(dev, &h->clkr);
+ if (ret) {
+ dev_err(dev, "failed to register regmap clock: %d\n", ret);
+ return ret;
+ }
+
+ return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
+ &h->clkr.hw);
}
static struct platform_driver qcom_hfpll_driver = {
--
2.22.0
next prev parent reply other threads:[~2019-08-26 16:45 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-26 16:45 [PATCH 1/5] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency Jorge Ramirez-Ortiz
2019-08-26 16:45 ` [PATCH 2/5] clk: qcom: apcs-msm8916: get parent clock names from DT Jorge Ramirez-Ortiz
2019-09-09 10:21 ` Stephen Boyd
2019-09-09 14:17 ` Jorge Ramirez-Ortiz, Linaro
2019-09-09 16:17 ` Stephen Boyd
2019-09-09 16:54 ` Jorge Ramirez-Ortiz, Linaro
2019-09-10 9:14 ` Stephen Boyd
2019-09-10 9:34 ` Jorge Ramirez
2019-09-10 9:40 ` Jorge Ramirez
2019-09-10 10:20 ` Stephen Boyd
2019-09-09 10:23 ` Stephen Boyd
2019-08-26 16:45 ` [PATCH 3/5] clk: qcom: hfpll: " Jorge Ramirez-Ortiz
2019-09-09 10:22 ` Stephen Boyd
2019-08-26 16:45 ` Jorge Ramirez-Ortiz [this message]
2019-09-09 10:22 ` [PATCH 4/5] clk: qcom: hfpll: register as clock provider Stephen Boyd
2019-08-26 16:45 ` [PATCH 5/5] clk: qcom: hfpll: CLK_IGNORE_UNUSED Jorge Ramirez-Ortiz
2019-09-09 10:23 ` Stephen Boyd
2019-09-05 7:30 ` [PATCH 1/5] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency Jorge Ramirez
2019-09-09 10:05 ` Stephen Boyd
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