linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Anup Patel <Anup.Patel@wdc.com>
To: Palmer Dabbelt <palmer@sifive.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Paolo Bonzini <pbonzini@redhat.com>, Radim K <rkrcmar@redhat.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Atish Patra <Atish.Patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Damien Le Moal <Damien.LeMoal@wdc.com>,
	Christoph Hellwig <hch@infradead.org>,
	Anup Patel <anup@brainfault.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Anup Patel <Anup.Patel@wdc.com>
Subject: [PATCH v6 01/21] KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface
Date: Thu, 29 Aug 2019 13:55:19 +0000	[thread overview]
Message-ID: <20190829135427.47808-2-anup.patel@wdc.com> (raw)
In-Reply-To: <20190829135427.47808-1-anup.patel@wdc.com>

We will be using ONE_REG interface accessing VCPU registers from
user-space hence we add KVM_REG_RISCV for RISC-V VCPU registers.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Alexander Graf <graf@amazon.com>
---
 include/uapi/linux/kvm.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index 5e3f12d5359e..fcaea3c2fc7e 100644
--- a/include/uapi/linux/kvm.h
+++ b/include/uapi/linux/kvm.h
@@ -1142,6 +1142,7 @@ struct kvm_dirty_tlb {
 #define KVM_REG_S390		0x5000000000000000ULL
 #define KVM_REG_ARM64		0x6000000000000000ULL
 #define KVM_REG_MIPS		0x7000000000000000ULL
+#define KVM_REG_RISCV		0x8000000000000000ULL
 
 #define KVM_REG_SIZE_SHIFT	52
 #define KVM_REG_SIZE_MASK	0x00f0000000000000ULL
-- 
2.17.1


  reply	other threads:[~2019-08-29 13:55 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-29 13:55 [PATCH v6 00/21] KVM RISC-V Support Anup Patel
2019-08-29 13:55 ` Anup Patel [this message]
2019-08-29 13:55 ` [PATCH v6 02/21] RISC-V: Add bitmap reprensenting ISA features common across CPUs Anup Patel
2019-08-29 13:55 ` [PATCH v6 03/21] RISC-V: Export few kernel symbols Anup Patel
2019-08-29 13:55 ` [PATCH v6 04/21] RISC-V: Add hypervisor extension related CSR defines Anup Patel
2019-08-29 13:55 ` [PATCH v6 05/21] RISC-V: Add initial skeletal KVM support Anup Patel
2019-08-29 13:55 ` [PATCH v6 06/21] RISC-V: KVM: Implement VCPU create, init and destroy functions Anup Patel
2019-08-29 13:55 ` [PATCH v6 07/21] RISC-V: KVM: Implement VCPU interrupts and requests handling Anup Patel
2019-08-29 13:56 ` [PATCH v6 08/21] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls Anup Patel
2019-08-29 13:56 ` [PATCH v6 09/21] RISC-V: KVM: Implement VCPU world-switch Anup Patel
2019-08-29 13:56 ` [PATCH v6 10/21] RISC-V: KVM: Handle MMIO exits for VCPU Anup Patel
2019-09-03  8:58   ` Andrew Jones
2019-09-03  9:26     ` Anup Patel
2019-09-03  9:33   ` Anup Patel
2019-08-29 13:56 ` [PATCH v6 11/21] RISC-V: KVM: Handle WFI " Anup Patel
2019-08-29 13:56 ` [PATCH v6 12/21] RISC-V: KVM: Implement VMID allocator Anup Patel
2019-08-29 13:56 ` [PATCH v6 13/21] RISC-V: KVM: Implement stage2 page table programming Anup Patel
2019-08-29 13:56 ` [PATCH v6 14/21] RISC-V: KVM: Implement MMU notifiers Anup Patel
2019-08-29 13:56 ` [PATCH v6 15/21] RISC-V: KVM: Add timer functionality Anup Patel
2019-08-29 13:56 ` [PATCH v6 16/21] RISC-V: KVM: FP lazy save/restore Anup Patel
2019-08-29 13:57 ` [PATCH v6 17/21] RISC-V: KVM: Implement ONE REG interface for FP registers Anup Patel
2019-08-29 13:57 ` [PATCH v6 18/21] RISC-V: KVM: Add SBI v0.1 support Anup Patel
2019-08-29 13:57 ` [PATCH v6 19/21] RISC-V: KVM: Document RISC-V specific parts of KVM API Anup Patel
2019-09-03  9:53   ` Anup Patel
2019-08-29 13:57 ` [PATCH v6 20/21] RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig Anup Patel
2019-08-29 13:57 ` [PATCH v6 21/21] RISC-V: KVM: Add MAINTAINERS entry Anup Patel
2019-09-04  3:39   ` Anup Patel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190829135427.47808-2-anup.patel@wdc.com \
    --to=anup.patel@wdc.com \
    --cc=Alistair.Francis@wdc.com \
    --cc=Atish.Patra@wdc.com \
    --cc=Damien.LeMoal@wdc.com \
    --cc=anup@brainfault.org \
    --cc=daniel.lezcano@linaro.org \
    --cc=hch@infradead.org \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@sifive.com \
    --cc=paul.walmsley@sifive.com \
    --cc=pbonzini@redhat.com \
    --cc=rkrcmar@redhat.com \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).