* [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy
@ 2019-08-23 7:00 Chunfeng Yun
2019-08-23 7:00 ` [PATCH 02/11] dt-bindings: phy-mtk-tphy: make the ref clock optional Chunfeng Yun
` (10 more replies)
0 siblings, 11 replies; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-23 7:00 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring
Cc: Mark Rutland, Matthias Brugger, Chunfeng Yun, linux-arm-kernel,
linux-mediatek, linux-kernel, devicetree
Add two optional properties, one for J-K test, another for disconnect
threshold, both of them can be used to debug disconnection issues.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
index a5f7a4f0dbc1..d5b327f85fa2 100644
--- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
+++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
@@ -52,6 +52,8 @@ Optional properties (PHY_TYPE_USB2 port (child) node):
- mediatek,eye-vrt : u32, the selection of VRT reference voltage
- mediatek,eye-term : u32, the selection of HS_TX TERM reference voltage
- mediatek,bc12 : bool, enable BC12 of u2phy if support it
+- mediatek,discth : u32, the voltage of disconnect threshold
+- mediatek,intr : u32, the value of internal R (resistance)
Example:
--
2.23.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 02/11] dt-bindings: phy-mtk-tphy: make the ref clock optional
2019-08-23 7:00 [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
@ 2019-08-23 7:00 ` Chunfeng Yun
2019-08-29 19:25 ` Rob Herring
2019-08-23 7:00 ` [PATCH 03/11] dt-bindings: phy-mtk-tphy: remove unused u3phya_ref clock Chunfeng Yun
` (9 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-23 7:00 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring
Cc: Mark Rutland, Matthias Brugger, Chunfeng Yun, linux-arm-kernel,
linux-mediatek, linux-kernel, devicetree
Make the ref clock optional, then we no need refer to a fixed-clock
in DTS anymore when the clock of USB3 PHY comes from oscillator
directly
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
.../devicetree/bindings/phy/phy-mtk-tphy.txt | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
index d5b327f85fa2..1c18bf10b2fe 100644
--- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
+++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
@@ -34,12 +34,6 @@ Optional properties (controller (parent) node):
Required properties (port (child) node):
- reg : address and length of the register set for the port.
-- clocks : a list of phandle + clock-specifier pairs, one for each
- entry in clock-names
-- clock-names : must contain
- "ref": 48M reference clock for HighSpeed analog phy; and 26M
- reference clock for SuperSpeed analog phy, sometimes is
- 24M, 25M or 27M, depended on platform.
- #phy-cells : should be 1 (See second example)
cell after port phandle is phy type from:
- PHY_TYPE_USB2
@@ -48,6 +42,13 @@ Required properties (port (child) node):
- PHY_TYPE_SATA
Optional properties (PHY_TYPE_USB2 port (child) node):
+- clocks : a list of phandle + clock-specifier pairs, one for each
+ entry in clock-names
+- clock-names : may contain
+ "ref": 48M reference clock for HighSpeed anolog phy; and 26M
+ reference clock for SuperSpeed anolog phy, sometimes is
+ 24M, 25M or 27M, depended on platform.
+
- mediatek,eye-src : u32, the value of slew rate calibrate
- mediatek,eye-vrt : u32, the selection of VRT reference voltage
- mediatek,eye-term : u32, the selection of HS_TX TERM reference voltage
--
2.23.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 03/11] dt-bindings: phy-mtk-tphy: remove unused u3phya_ref clock
2019-08-23 7:00 [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
2019-08-23 7:00 ` [PATCH 02/11] dt-bindings: phy-mtk-tphy: make the ref clock optional Chunfeng Yun
@ 2019-08-23 7:00 ` Chunfeng Yun
2019-08-29 20:03 ` Rob Herring
2019-08-23 7:00 ` [PATCH 04/11] dt-bindings: phy-mtk-tphy: add a new reference clock Chunfeng Yun
` (8 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-23 7:00 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring
Cc: Mark Rutland, Matthias Brugger, Chunfeng Yun, linux-arm-kernel,
linux-mediatek, linux-kernel, devicetree
The u3phya_ref clock is already moved into sub-node, and
renamed as ref clock, no used anymore now, so remove it
to avoid confusion
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt | 4 ----
1 file changed, 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
index 1c18bf10b2fe..dbc143ed5999 100644
--- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
+++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
@@ -13,10 +13,6 @@ Required properties (controller (parent) node):
"mediatek,mt8173-u3phy";
make use of "mediatek,generic-tphy-v1" on mt2701 instead and
"mediatek,generic-tphy-v2" on mt2712 instead.
- - clocks : (deprecated, use port's clocks instead) a list of phandle +
- clock-specifier pairs, one for each entry in clock-names
- - clock-names : (deprecated, use port's one instead) must contain
- "u3phya_ref": for reference clock of usb3.0 analog phy.
Required nodes : a sub-node is required for each port the controller
provides. Address range information including the usual
--
2.23.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 04/11] dt-bindings: phy-mtk-tphy: add a new reference clock
2019-08-23 7:00 [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
2019-08-23 7:00 ` [PATCH 02/11] dt-bindings: phy-mtk-tphy: make the ref clock optional Chunfeng Yun
2019-08-23 7:00 ` [PATCH 03/11] dt-bindings: phy-mtk-tphy: remove unused u3phya_ref clock Chunfeng Yun
@ 2019-08-23 7:00 ` Chunfeng Yun
2019-08-29 20:05 ` Rob Herring
2019-08-23 7:00 ` [PATCH 05/11] dt-bindings: phy-mtk-tphy: add the properties about address mapping Chunfeng Yun
` (7 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-23 7:00 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring
Cc: Mark Rutland, Matthias Brugger, Chunfeng Yun, linux-arm-kernel,
linux-mediatek, linux-kernel, devicetree
Usually the digital and anolog phys use the same reference clock,
but on some platforms, they are separated, so add another optional
clock to support it.
In order to keep the clock names consistent with PHY IP's, use
the da_ref for anolog phy and ref clock for digital phy.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
index dbc143ed5999..ed9a2641f204 100644
--- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
+++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
@@ -41,9 +41,12 @@ Optional properties (PHY_TYPE_USB2 port (child) node):
- clocks : a list of phandle + clock-specifier pairs, one for each
entry in clock-names
- clock-names : may contain
- "ref": 48M reference clock for HighSpeed anolog phy; and 26M
- reference clock for SuperSpeed anolog phy, sometimes is
+ "ref": 48M reference clock for HighSpeed (digital) phy; and 26M
+ reference clock for SuperSpeed (digital) phy, sometimes is
24M, 25M or 27M, depended on platform.
+ "da_ref": the reference clock of anolog phy, used if the clocks
+ of anolog and digital phys are separated, otherwise uses
+ "ref" clock only if need.
- mediatek,eye-src : u32, the value of slew rate calibrate
- mediatek,eye-vrt : u32, the selection of VRT reference voltage
--
2.23.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 05/11] dt-bindings: phy-mtk-tphy: add the properties about address mapping
2019-08-23 7:00 [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
` (2 preceding siblings ...)
2019-08-23 7:00 ` [PATCH 04/11] dt-bindings: phy-mtk-tphy: add a new reference clock Chunfeng Yun
@ 2019-08-23 7:00 ` Chunfeng Yun
2019-08-29 20:16 ` Rob Herring
2019-08-23 7:00 ` [PATCH 06/11] phy: phy-mtk-tphy: add a property for disconnect threshold Chunfeng Yun
` (6 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-23 7:00 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring
Cc: Mark Rutland, Matthias Brugger, Chunfeng Yun, linux-arm-kernel,
linux-mediatek, linux-kernel, devicetree
Add three required properties about the address mapping, including
'#address-cells', '#size-cells' and 'ranges'
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
index ed9a2641f204..e162af66741e 100644
--- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
+++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
@@ -14,6 +14,16 @@ Required properties (controller (parent) node):
make use of "mediatek,generic-tphy-v1" on mt2701 instead and
"mediatek,generic-tphy-v2" on mt2712 instead.
+- #address-cells: the number of cells used to represent physical
+ base addresses.
+- #size-cells: the number of cells used to represent the size of an address.
+- ranges: the address mapping relationship to the parent, defined with
+ - empty value: if optional 'reg' is used.
+ - non-empty value: if optional 'reg' is not used. should set
+ the child's base address to 0, the physical address
+ within parent's address space, and the length of
+ the address map.
+
Required nodes : a sub-node is required for each port the controller
provides. Address range information including the usual
'reg' property is used inside these nodes to describe
--
2.23.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 06/11] phy: phy-mtk-tphy: add a property for disconnect threshold
2019-08-23 7:00 [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
` (3 preceding siblings ...)
2019-08-23 7:00 ` [PATCH 05/11] dt-bindings: phy-mtk-tphy: add the properties about address mapping Chunfeng Yun
@ 2019-08-23 7:00 ` Chunfeng Yun
2019-08-23 7:00 ` [PATCH 07/11] phy: phy-mtk-tphy: add a property for internal resistance Chunfeng Yun
` (5 subsequent siblings)
10 siblings, 0 replies; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-23 7:00 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring
Cc: Mark Rutland, Matthias Brugger, Chunfeng Yun, linux-arm-kernel,
linux-mediatek, linux-kernel, devicetree
This is used to tune the threshold of disconnect
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
drivers/phy/mediatek/phy-mtk-tphy.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c
index cb2ed3b25068..5afe33621dbc 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -60,6 +60,8 @@
#define U3P_USBPHYACR6 0x018
#define PA6_RG_U2_BC11_SW_EN BIT(23)
#define PA6_RG_U2_OTG_VBUSCMP_EN BIT(20)
+#define PA6_RG_U2_DISCTH GENMASK(7, 4)
+#define PA6_RG_U2_DISCTH_VAL(x) ((0xf & (x)) << 4)
#define PA6_RG_U2_SQTH GENMASK(3, 0)
#define PA6_RG_U2_SQTH_VAL(x) (0xf & (x))
@@ -300,6 +302,7 @@ struct mtk_phy_instance {
int eye_src;
int eye_vrt;
int eye_term;
+ int discth;
bool bc12_en;
};
@@ -850,9 +853,12 @@ static void phy_parse_property(struct mtk_tphy *tphy,
&instance->eye_vrt);
device_property_read_u32(dev, "mediatek,eye-term",
&instance->eye_term);
- dev_dbg(dev, "bc12:%d, src:%d, vrt:%d, term:%d\n",
+ device_property_read_u32(dev, "mediatek,discth",
+ &instance->discth);
+ dev_dbg(dev, "bc12:%d, src:%d, vrt:%d, term:%d, disc:%d\n",
instance->bc12_en, instance->eye_src,
- instance->eye_vrt, instance->eye_term);
+ instance->eye_vrt, instance->eye_term,
+ instance->discth);
}
static void u2_phy_props_set(struct mtk_tphy *tphy,
@@ -888,6 +894,13 @@ static void u2_phy_props_set(struct mtk_tphy *tphy,
tmp |= PA1_RG_TERM_SEL_VAL(instance->eye_term);
writel(tmp, com + U3P_USBPHYACR1);
}
+
+ if (instance->discth) {
+ tmp = readl(com + U3P_USBPHYACR6);
+ tmp &= ~PA6_RG_U2_DISCTH;
+ tmp |= PA6_RG_U2_DISCTH_VAL(instance->discth);
+ writel(tmp, com + U3P_USBPHYACR6);
+ }
}
static int mtk_phy_init(struct phy *phy)
--
2.23.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 07/11] phy: phy-mtk-tphy: add a property for internal resistance
2019-08-23 7:00 [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
` (4 preceding siblings ...)
2019-08-23 7:00 ` [PATCH 06/11] phy: phy-mtk-tphy: add a property for disconnect threshold Chunfeng Yun
@ 2019-08-23 7:00 ` Chunfeng Yun
2019-08-23 7:00 ` [PATCH 08/11] phy: phy-mtk-tphy: make the ref clock optional Chunfeng Yun
` (4 subsequent siblings)
10 siblings, 0 replies; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-23 7:00 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring
Cc: Mark Rutland, Matthias Brugger, Chunfeng Yun, linux-arm-kernel,
linux-mediatek, linux-kernel, devicetree
This is used to tune internal resistance for J-K test
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
drivers/phy/mediatek/phy-mtk-tphy.c | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c
index 5afe33621dbc..4a2dc92f10f5 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -43,6 +43,8 @@
#define PA0_RG_USB20_INTR_EN BIT(5)
#define U3P_USBPHYACR1 0x004
+#define PA1_RG_INTR_CAL GENMASK(23, 19)
+#define PA1_RG_INTR_CAL_VAL(x) ((0x1f & (x)) << 19)
#define PA1_RG_VRT_SEL GENMASK(14, 12)
#define PA1_RG_VRT_SEL_VAL(x) ((0x7 & (x)) << 12)
#define PA1_RG_TERM_SEL GENMASK(10, 8)
@@ -302,6 +304,7 @@ struct mtk_phy_instance {
int eye_src;
int eye_vrt;
int eye_term;
+ int intr;
int discth;
bool bc12_en;
};
@@ -853,12 +856,14 @@ static void phy_parse_property(struct mtk_tphy *tphy,
&instance->eye_vrt);
device_property_read_u32(dev, "mediatek,eye-term",
&instance->eye_term);
+ device_property_read_u32(dev, "mediatek,intr",
+ &instance->intr);
device_property_read_u32(dev, "mediatek,discth",
&instance->discth);
- dev_dbg(dev, "bc12:%d, src:%d, vrt:%d, term:%d, disc:%d\n",
+ dev_dbg(dev, "bc12:%d, src:%d, vrt:%d, term:%d, intr:%d, disc:%d\n",
instance->bc12_en, instance->eye_src,
instance->eye_vrt, instance->eye_term,
- instance->discth);
+ instance->intr, instance->discth);
}
static void u2_phy_props_set(struct mtk_tphy *tphy,
@@ -895,6 +900,13 @@ static void u2_phy_props_set(struct mtk_tphy *tphy,
writel(tmp, com + U3P_USBPHYACR1);
}
+ if (instance->intr) {
+ tmp = readl(com + U3P_USBPHYACR1);
+ tmp &= ~PA1_RG_INTR_CAL;
+ tmp |= PA1_RG_INTR_CAL_VAL(instance->intr);
+ writel(tmp, com + U3P_USBPHYACR1);
+ }
+
if (instance->discth) {
tmp = readl(com + U3P_USBPHYACR6);
tmp &= ~PA6_RG_U2_DISCTH;
--
2.23.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 08/11] phy: phy-mtk-tphy: make the ref clock optional
2019-08-23 7:00 [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
` (5 preceding siblings ...)
2019-08-23 7:00 ` [PATCH 07/11] phy: phy-mtk-tphy: add a property for internal resistance Chunfeng Yun
@ 2019-08-23 7:00 ` Chunfeng Yun
2019-08-23 7:00 ` [PATCH 09/11] phy: phy-mtk-tphy: remove unused u3phya_ref clock Chunfeng Yun
` (3 subsequent siblings)
10 siblings, 0 replies; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-23 7:00 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring
Cc: Mark Rutland, Matthias Brugger, Chunfeng Yun, linux-arm-kernel,
linux-mediatek, linux-kernel, devicetree
Sometimes the reference clock of USB3 PHY comes from oscillator
directly, and no need refer to a fixed-clock in DTS anymore
if make it optional.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
drivers/phy/mediatek/phy-mtk-tphy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c
index 4a2dc92f10f5..96c62e3a3300 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -1182,7 +1182,7 @@ static int mtk_tphy_probe(struct platform_device *pdev)
if (tphy->u3phya_ref)
continue;
- instance->ref_clk = devm_clk_get(&phy->dev, "ref");
+ instance->ref_clk = devm_clk_get_optional(&phy->dev, "ref");
if (IS_ERR(instance->ref_clk)) {
dev_err(dev, "failed to get ref_clk(id-%d)\n", port);
retval = PTR_ERR(instance->ref_clk);
--
2.23.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 09/11] phy: phy-mtk-tphy: remove unused u3phya_ref clock
2019-08-23 7:00 [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
` (6 preceding siblings ...)
2019-08-23 7:00 ` [PATCH 08/11] phy: phy-mtk-tphy: make the ref clock optional Chunfeng Yun
@ 2019-08-23 7:00 ` Chunfeng Yun
2019-08-23 7:00 ` [PATCH 10/11] phy: phy-mtk-tphy: add a new reference clock Chunfeng Yun
` (2 subsequent siblings)
10 siblings, 0 replies; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-23 7:00 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring
Cc: Mark Rutland, Matthias Brugger, Chunfeng Yun, linux-arm-kernel,
linux-mediatek, linux-kernel, devicetree
The u3phya_ref clock is already moved into sub-node, and
renamed as ref clock, no used anymore now, so remove it,
this can avoid confusion when support new platforms
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
drivers/phy/mediatek/phy-mtk-tphy.c | 18 ------------------
1 file changed, 18 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c
index 96c62e3a3300..c6424fd2a06d 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -312,8 +312,6 @@ struct mtk_phy_instance {
struct mtk_tphy {
struct device *dev;
void __iomem *sif_base; /* only shared sif */
- /* deprecated, use @ref_clk instead in phy instance */
- struct clk *u3phya_ref; /* reference clock of usb3 anolog phy */
const struct mtk_phy_pdata *pdata;
struct mtk_phy_instance **phys;
int nphys;
@@ -921,12 +919,6 @@ static int mtk_phy_init(struct phy *phy)
struct mtk_tphy *tphy = dev_get_drvdata(phy->dev.parent);
int ret;
- ret = clk_prepare_enable(tphy->u3phya_ref);
- if (ret) {
- dev_err(tphy->dev, "failed to enable u3phya_ref\n");
- return ret;
- }
-
ret = clk_prepare_enable(instance->ref_clk);
if (ret) {
dev_err(tphy->dev, "failed to enable ref_clk\n");
@@ -992,7 +984,6 @@ static int mtk_phy_exit(struct phy *phy)
u2_phy_instance_exit(tphy, instance);
clk_disable_unprepare(instance->ref_clk);
- clk_disable_unprepare(tphy->u3phya_ref);
return 0;
}
@@ -1127,11 +1118,6 @@ static int mtk_tphy_probe(struct platform_device *pdev)
}
}
- /* it's deprecated, make it optional for backward compatibility */
- tphy->u3phya_ref = devm_clk_get_optional(dev, "u3phya_ref");
- if (IS_ERR(tphy->u3phya_ref))
- return PTR_ERR(tphy->u3phya_ref);
-
tphy->src_ref_clk = U3P_REF_CLK;
tphy->src_coef = U3P_SLEW_RATE_COEF;
/* update parameters of slew rate calibrate if exist */
@@ -1178,10 +1164,6 @@ static int mtk_tphy_probe(struct platform_device *pdev)
phy_set_drvdata(phy, instance);
port++;
- /* if deprecated clock is provided, ignore instance's one */
- if (tphy->u3phya_ref)
- continue;
-
instance->ref_clk = devm_clk_get_optional(&phy->dev, "ref");
if (IS_ERR(instance->ref_clk)) {
dev_err(dev, "failed to get ref_clk(id-%d)\n", port);
--
2.23.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 10/11] phy: phy-mtk-tphy: add a new reference clock
2019-08-23 7:00 [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
` (7 preceding siblings ...)
2019-08-23 7:00 ` [PATCH 09/11] phy: phy-mtk-tphy: remove unused u3phya_ref clock Chunfeng Yun
@ 2019-08-23 7:00 ` Chunfeng Yun
2019-08-23 7:00 ` [PATCH 11/11] arm64: dts: mt2712: use non-empty ranges for usb-phy Chunfeng Yun
2019-08-29 19:23 ` [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Rob Herring
10 siblings, 0 replies; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-23 7:00 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring
Cc: Mark Rutland, Matthias Brugger, Chunfeng Yun, linux-arm-kernel,
linux-mediatek, linux-kernel, devicetree
Usually the digital and anolog phys use the same reference clock,
but some platforms have two separate reference clocks for each of
them, so add another optional clock to support them.
In order to keep the clock names consistent with PHY IP's, change
the da_ref for anolog phy and ref clock for digital phy.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
drivers/phy/mediatek/phy-mtk-tphy.c | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c
index c6424fd2a06d..237e2c3fd4dc 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -298,7 +298,8 @@ struct mtk_phy_instance {
struct u2phy_banks u2_banks;
struct u3phy_banks u3_banks;
};
- struct clk *ref_clk; /* reference clock of anolog phy */
+ struct clk *ref_clk; /* reference clock of (digital) phy */
+ struct clk *da_ref_clk; /* reference clock of anolog phy */
u32 index;
u8 type;
int eye_src;
@@ -925,6 +926,13 @@ static int mtk_phy_init(struct phy *phy)
return ret;
}
+ ret = clk_prepare_enable(instance->da_ref_clk);
+ if (ret) {
+ dev_err(tphy->dev, "failed to enable da_ref\n");
+ clk_disable_unprepare(instance->ref_clk);
+ return ret;
+ }
+
switch (instance->type) {
case PHY_TYPE_USB2:
u2_phy_instance_init(tphy, instance);
@@ -984,6 +992,7 @@ static int mtk_phy_exit(struct phy *phy)
u2_phy_instance_exit(tphy, instance);
clk_disable_unprepare(instance->ref_clk);
+ clk_disable_unprepare(instance->da_ref_clk);
return 0;
}
@@ -1170,6 +1179,14 @@ static int mtk_tphy_probe(struct platform_device *pdev)
retval = PTR_ERR(instance->ref_clk);
goto put_child;
}
+
+ instance->da_ref_clk =
+ devm_clk_get_optional(&phy->dev, "da_ref");
+ if (IS_ERR(instance->da_ref_clk)) {
+ dev_err(dev, "failed to get da_ref_clk(id-%d)\n", port);
+ retval = PTR_ERR(instance->da_ref_clk);
+ goto put_child;
+ }
}
provider = devm_of_phy_provider_register(dev, mtk_phy_xlate);
--
2.23.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 11/11] arm64: dts: mt2712: use non-empty ranges for usb-phy
2019-08-23 7:00 [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
` (8 preceding siblings ...)
2019-08-23 7:00 ` [PATCH 10/11] phy: phy-mtk-tphy: add a new reference clock Chunfeng Yun
@ 2019-08-23 7:00 ` Chunfeng Yun
2019-08-29 19:23 ` [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Rob Herring
10 siblings, 0 replies; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-23 7:00 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring
Cc: Mark Rutland, Matthias Brugger, Chunfeng Yun, linux-arm-kernel,
linux-mediatek, linux-kernel, devicetree
Use non-empty ranges for usb-phy to make the layout of
its registers clearer
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 36 +++++++++++------------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 43307bad3f0d..37a6443b658e 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -698,29 +698,29 @@
u3phy0: usb-phy@11290000 {
compatible = "mediatek,mt2712-u3phy";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x11290000 0x9000>;
status = "okay";
- u2port0: usb-phy@11290000 {
- reg = <0 0x11290000 0 0x700>;
+ u2port0: usb-phy@0 {
+ reg = <0x0 0x700>;
clocks = <&clk26m>;
clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};
- u2port1: usb-phy@11298000 {
- reg = <0 0x11298000 0 0x700>;
+ u2port1: usb-phy@8000 {
+ reg = <0x8000 0x700>;
clocks = <&clk26m>;
clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};
- u3port0: usb-phy@11298700 {
- reg = <0 0x11298700 0 0x900>;
+ u3port0: usb-phy@8700 {
+ reg = <0x8700 0x900>;
clocks = <&clk26m>;
clock-names = "ref";
#phy-cells = <1>;
@@ -761,29 +761,29 @@
u3phy1: usb-phy@112e0000 {
compatible = "mediatek,mt2712-u3phy";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x112e0000 0x9000>;
status = "okay";
- u2port2: usb-phy@112e0000 {
- reg = <0 0x112e0000 0 0x700>;
+ u2port2: usb-phy@0 {
+ reg = <0x0 0x700>;
clocks = <&clk26m>;
clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};
- u2port3: usb-phy@112e8000 {
- reg = <0 0x112e8000 0 0x700>;
+ u2port3: usb-phy@8000 {
+ reg = <0x8000 0x700>;
clocks = <&clk26m>;
clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};
- u3port1: usb-phy@112e8700 {
- reg = <0 0x112e8700 0 0x900>;
+ u3port1: usb-phy@8700 {
+ reg = <0x8700 0x900>;
clocks = <&clk26m>;
clock-names = "ref";
#phy-cells = <1>;
--
2.23.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy
2019-08-23 7:00 [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
` (9 preceding siblings ...)
2019-08-23 7:00 ` [PATCH 11/11] arm64: dts: mt2712: use non-empty ranges for usb-phy Chunfeng Yun
@ 2019-08-29 19:23 ` Rob Herring
2019-08-30 6:03 ` Chunfeng Yun
10 siblings, 1 reply; 19+ messages in thread
From: Rob Herring @ 2019-08-29 19:23 UTC (permalink / raw)
To: Chunfeng Yun
Cc: Kishon Vijay Abraham I, Mark Rutland, Matthias Brugger,
linux-arm-kernel, linux-mediatek, linux-kernel, devicetree
On Fri, Aug 23, 2019 at 03:00:08PM +0800, Chunfeng Yun wrote:
> Add two optional properties, one for J-K test, another for disconnect
> threshold, both of them can be used to debug disconnection issues.
Testing and debug properties aren't really things that belong in DT.
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> ---
> Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> index a5f7a4f0dbc1..d5b327f85fa2 100644
> --- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> +++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> @@ -52,6 +52,8 @@ Optional properties (PHY_TYPE_USB2 port (child) node):
> - mediatek,eye-vrt : u32, the selection of VRT reference voltage
> - mediatek,eye-term : u32, the selection of HS_TX TERM reference voltage
> - mediatek,bc12 : bool, enable BC12 of u2phy if support it
> +- mediatek,discth : u32, the voltage of disconnect threshold
> +- mediatek,intr : u32, the value of internal R (resistance)
These need units as defined in property-units.txt.
>
> Example:
>
> --
> 2.23.0
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 02/11] dt-bindings: phy-mtk-tphy: make the ref clock optional
2019-08-23 7:00 ` [PATCH 02/11] dt-bindings: phy-mtk-tphy: make the ref clock optional Chunfeng Yun
@ 2019-08-29 19:25 ` Rob Herring
2019-08-30 6:22 ` Chunfeng Yun
0 siblings, 1 reply; 19+ messages in thread
From: Rob Herring @ 2019-08-29 19:25 UTC (permalink / raw)
To: Chunfeng Yun
Cc: Kishon Vijay Abraham I, Mark Rutland, Matthias Brugger,
linux-arm-kernel, linux-mediatek, linux-kernel, devicetree
On Fri, Aug 23, 2019 at 03:00:09PM +0800, Chunfeng Yun wrote:
> Make the ref clock optional, then we no need refer to a fixed-clock
> in DTS anymore when the clock of USB3 PHY comes from oscillator
> directly
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> ---
> .../devicetree/bindings/phy/phy-mtk-tphy.txt | 13 +++++++------
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> index d5b327f85fa2..1c18bf10b2fe 100644
> --- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> +++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> @@ -34,12 +34,6 @@ Optional properties (controller (parent) node):
>
> Required properties (port (child) node):
> - reg : address and length of the register set for the port.
> -- clocks : a list of phandle + clock-specifier pairs, one for each
> - entry in clock-names
> -- clock-names : must contain
> - "ref": 48M reference clock for HighSpeed analog phy; and 26M
> - reference clock for SuperSpeed analog phy, sometimes is
> - 24M, 25M or 27M, depended on platform.
> - #phy-cells : should be 1 (See second example)
> cell after port phandle is phy type from:
> - PHY_TYPE_USB2
> @@ -48,6 +42,13 @@ Required properties (port (child) node):
> - PHY_TYPE_SATA
>
> Optional properties (PHY_TYPE_USB2 port (child) node):
> +- clocks : a list of phandle + clock-specifier pairs, one for each
> + entry in clock-names
> +- clock-names : may contain
> + "ref": 48M reference clock for HighSpeed anolog phy; and 26M
> + reference clock for SuperSpeed anolog phy, sometimes is
> + 24M, 25M or 27M, depended on platform.
How do you know the frequency when it is not present?
> +
> - mediatek,eye-src : u32, the value of slew rate calibrate
> - mediatek,eye-vrt : u32, the selection of VRT reference voltage
> - mediatek,eye-term : u32, the selection of HS_TX TERM reference voltage
> --
> 2.23.0
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 03/11] dt-bindings: phy-mtk-tphy: remove unused u3phya_ref clock
2019-08-23 7:00 ` [PATCH 03/11] dt-bindings: phy-mtk-tphy: remove unused u3phya_ref clock Chunfeng Yun
@ 2019-08-29 20:03 ` Rob Herring
0 siblings, 0 replies; 19+ messages in thread
From: Rob Herring @ 2019-08-29 20:03 UTC (permalink / raw)
To: Chunfeng Yun
Cc: Kishon Vijay Abraham I, Mark Rutland, Matthias Brugger,
Chunfeng Yun, linux-arm-kernel, linux-mediatek, linux-kernel,
devicetree
On Fri, 23 Aug 2019 15:00:10 +0800, Chunfeng Yun wrote:
> The u3phya_ref clock is already moved into sub-node, and
> renamed as ref clock, no used anymore now, so remove it
> to avoid confusion
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> ---
> Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt | 4 ----
> 1 file changed, 4 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 04/11] dt-bindings: phy-mtk-tphy: add a new reference clock
2019-08-23 7:00 ` [PATCH 04/11] dt-bindings: phy-mtk-tphy: add a new reference clock Chunfeng Yun
@ 2019-08-29 20:05 ` Rob Herring
2019-08-30 6:23 ` Chunfeng Yun
0 siblings, 1 reply; 19+ messages in thread
From: Rob Herring @ 2019-08-29 20:05 UTC (permalink / raw)
To: Chunfeng Yun
Cc: Kishon Vijay Abraham I, Mark Rutland, Matthias Brugger,
linux-arm-kernel, linux-mediatek, linux-kernel, devicetree
On Fri, Aug 23, 2019 at 03:00:11PM +0800, Chunfeng Yun wrote:
> Usually the digital and anolog phys use the same reference clock,
> but on some platforms, they are separated, so add another optional
> clock to support it.
> In order to keep the clock names consistent with PHY IP's, use
> the da_ref for anolog phy and ref clock for digital phy.
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> ---
> Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> index dbc143ed5999..ed9a2641f204 100644
> --- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> +++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> @@ -41,9 +41,12 @@ Optional properties (PHY_TYPE_USB2 port (child) node):
> - clocks : a list of phandle + clock-specifier pairs, one for each
> entry in clock-names
> - clock-names : may contain
> - "ref": 48M reference clock for HighSpeed anolog phy; and 26M
> - reference clock for SuperSpeed anolog phy, sometimes is
> + "ref": 48M reference clock for HighSpeed (digital) phy; and 26M
> + reference clock for SuperSpeed (digital) phy, sometimes is
> 24M, 25M or 27M, depended on platform.
> + "da_ref": the reference clock of anolog phy, used if the clocks
> + of anolog and digital phys are separated, otherwise uses
s/amolog/analog/
> + "ref" clock only if need.
needed.
>
> - mediatek,eye-src : u32, the value of slew rate calibrate
> - mediatek,eye-vrt : u32, the selection of VRT reference voltage
> --
> 2.23.0
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 05/11] dt-bindings: phy-mtk-tphy: add the properties about address mapping
2019-08-23 7:00 ` [PATCH 05/11] dt-bindings: phy-mtk-tphy: add the properties about address mapping Chunfeng Yun
@ 2019-08-29 20:16 ` Rob Herring
0 siblings, 0 replies; 19+ messages in thread
From: Rob Herring @ 2019-08-29 20:16 UTC (permalink / raw)
To: Chunfeng Yun
Cc: Kishon Vijay Abraham I, Mark Rutland, Matthias Brugger,
Chunfeng Yun, linux-arm-kernel, linux-mediatek, linux-kernel,
devicetree
On Fri, 23 Aug 2019 15:00:12 +0800, Chunfeng Yun wrote:
> Add three required properties about the address mapping, including
> '#address-cells', '#size-cells' and 'ranges'
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> ---
> Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy
2019-08-29 19:23 ` [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Rob Herring
@ 2019-08-30 6:03 ` Chunfeng Yun
0 siblings, 0 replies; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-30 6:03 UTC (permalink / raw)
To: Rob Herring
Cc: Kishon Vijay Abraham I, Mark Rutland, Matthias Brugger,
linux-arm-kernel, linux-mediatek, linux-kernel, devicetree
On Thu, 2019-08-29 at 14:23 -0500, Rob Herring wrote:
> On Fri, Aug 23, 2019 at 03:00:08PM +0800, Chunfeng Yun wrote:
> > Add two optional properties, one for J-K test, another for disconnect
> > threshold, both of them can be used to debug disconnection issues.
>
> Testing and debug properties aren't really things that belong in DT.
They are not only for test and debug, but also used to tune default
value for some platforms, I'll modify the description
>
> >
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > ---
> > Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> > index a5f7a4f0dbc1..d5b327f85fa2 100644
> > --- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> > +++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> > @@ -52,6 +52,8 @@ Optional properties (PHY_TYPE_USB2 port (child) node):
> > - mediatek,eye-vrt : u32, the selection of VRT reference voltage
> > - mediatek,eye-term : u32, the selection of HS_TX TERM reference voltage
> > - mediatek,bc12 : bool, enable BC12 of u2phy if support it
> > +- mediatek,discth : u32, the voltage of disconnect threshold
> > +- mediatek,intr : u32, the value of internal R (resistance)
>
> These need units as defined in property-units.txt.
They are in fact the choice index of different level, will modify it
Thank you
>
> >
> > Example:
> >
> > --
> > 2.23.0
> >
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 02/11] dt-bindings: phy-mtk-tphy: make the ref clock optional
2019-08-29 19:25 ` Rob Herring
@ 2019-08-30 6:22 ` Chunfeng Yun
0 siblings, 0 replies; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-30 6:22 UTC (permalink / raw)
To: Rob Herring
Cc: Kishon Vijay Abraham I, Mark Rutland, Matthias Brugger,
linux-arm-kernel, linux-mediatek, linux-kernel, devicetree
On Thu, 2019-08-29 at 14:25 -0500, Rob Herring wrote:
> On Fri, Aug 23, 2019 at 03:00:09PM +0800, Chunfeng Yun wrote:
> > Make the ref clock optional, then we no need refer to a fixed-clock
> > in DTS anymore when the clock of USB3 PHY comes from oscillator
> > directly
> >
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > ---
> > .../devicetree/bindings/phy/phy-mtk-tphy.txt | 13 +++++++------
> > 1 file changed, 7 insertions(+), 6 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> > index d5b327f85fa2..1c18bf10b2fe 100644
> > --- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> > +++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> > @@ -34,12 +34,6 @@ Optional properties (controller (parent) node):
> >
> > Required properties (port (child) node):
> > - reg : address and length of the register set for the port.
> > -- clocks : a list of phandle + clock-specifier pairs, one for each
> > - entry in clock-names
> > -- clock-names : must contain
> > - "ref": 48M reference clock for HighSpeed analog phy; and 26M
> > - reference clock for SuperSpeed analog phy, sometimes is
> > - 24M, 25M or 27M, depended on platform.
> > - #phy-cells : should be 1 (See second example)
> > cell after port phandle is phy type from:
> > - PHY_TYPE_USB2
> > @@ -48,6 +42,13 @@ Required properties (port (child) node):
> > - PHY_TYPE_SATA
> >
> > Optional properties (PHY_TYPE_USB2 port (child) node):
> > +- clocks : a list of phandle + clock-specifier pairs, one for each
> > + entry in clock-names
> > +- clock-names : may contain
> > + "ref": 48M reference clock for HighSpeed anolog phy; and 26M
> > + reference clock for SuperSpeed anolog phy, sometimes is
> > + 24M, 25M or 27M, depended on platform.
>
> How do you know the frequency when it is not present?
It's always present, but sometimes it's always on by default (e.g. 48Mhz
of U2 PHY), or comes from oscillator directly (e.g. 26Mhz of U3 PHY),
so not controlled by CCF, of course we can use a fixed-clock in latter
case, it's useful to make it optional for these two cases.
Thanks
>
> > +
> > - mediatek,eye-src : u32, the value of slew rate calibrate
> > - mediatek,eye-vrt : u32, the selection of VRT reference voltage
> > - mediatek,eye-term : u32, the selection of HS_TX TERM reference voltage
> > --
> > 2.23.0
> >
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 04/11] dt-bindings: phy-mtk-tphy: add a new reference clock
2019-08-29 20:05 ` Rob Herring
@ 2019-08-30 6:23 ` Chunfeng Yun
0 siblings, 0 replies; 19+ messages in thread
From: Chunfeng Yun @ 2019-08-30 6:23 UTC (permalink / raw)
To: Rob Herring
Cc: Kishon Vijay Abraham I, Mark Rutland, Matthias Brugger,
linux-arm-kernel, linux-mediatek, linux-kernel, devicetree
On Thu, 2019-08-29 at 15:05 -0500, Rob Herring wrote:
> On Fri, Aug 23, 2019 at 03:00:11PM +0800, Chunfeng Yun wrote:
> > Usually the digital and anolog phys use the same reference clock,
> > but on some platforms, they are separated, so add another optional
> > clock to support it.
> > In order to keep the clock names consistent with PHY IP's, use
> > the da_ref for anolog phy and ref clock for digital phy.
> >
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > ---
> > Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt | 7 +++++--
> > 1 file changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> > index dbc143ed5999..ed9a2641f204 100644
> > --- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> > +++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> > @@ -41,9 +41,12 @@ Optional properties (PHY_TYPE_USB2 port (child) node):
> > - clocks : a list of phandle + clock-specifier pairs, one for each
> > entry in clock-names
> > - clock-names : may contain
> > - "ref": 48M reference clock for HighSpeed anolog phy; and 26M
> > - reference clock for SuperSpeed anolog phy, sometimes is
> > + "ref": 48M reference clock for HighSpeed (digital) phy; and 26M
> > + reference clock for SuperSpeed (digital) phy, sometimes is
> > 24M, 25M or 27M, depended on platform.
> > + "da_ref": the reference clock of anolog phy, used if the clocks
> > + of anolog and digital phys are separated, otherwise uses
>
> s/amolog/analog/
will fix it
>
> > + "ref" clock only if need.
>
> needed.
also here
Thanks a lot
>
> >
> > - mediatek,eye-src : u32, the value of slew rate calibrate
> > - mediatek,eye-vrt : u32, the selection of VRT reference voltage
> > --
> > 2.23.0
> >
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2019-08-30 6:24 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-23 7:00 [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
2019-08-23 7:00 ` [PATCH 02/11] dt-bindings: phy-mtk-tphy: make the ref clock optional Chunfeng Yun
2019-08-29 19:25 ` Rob Herring
2019-08-30 6:22 ` Chunfeng Yun
2019-08-23 7:00 ` [PATCH 03/11] dt-bindings: phy-mtk-tphy: remove unused u3phya_ref clock Chunfeng Yun
2019-08-29 20:03 ` Rob Herring
2019-08-23 7:00 ` [PATCH 04/11] dt-bindings: phy-mtk-tphy: add a new reference clock Chunfeng Yun
2019-08-29 20:05 ` Rob Herring
2019-08-30 6:23 ` Chunfeng Yun
2019-08-23 7:00 ` [PATCH 05/11] dt-bindings: phy-mtk-tphy: add the properties about address mapping Chunfeng Yun
2019-08-29 20:16 ` Rob Herring
2019-08-23 7:00 ` [PATCH 06/11] phy: phy-mtk-tphy: add a property for disconnect threshold Chunfeng Yun
2019-08-23 7:00 ` [PATCH 07/11] phy: phy-mtk-tphy: add a property for internal resistance Chunfeng Yun
2019-08-23 7:00 ` [PATCH 08/11] phy: phy-mtk-tphy: make the ref clock optional Chunfeng Yun
2019-08-23 7:00 ` [PATCH 09/11] phy: phy-mtk-tphy: remove unused u3phya_ref clock Chunfeng Yun
2019-08-23 7:00 ` [PATCH 10/11] phy: phy-mtk-tphy: add a new reference clock Chunfeng Yun
2019-08-23 7:00 ` [PATCH 11/11] arm64: dts: mt2712: use non-empty ranges for usb-phy Chunfeng Yun
2019-08-29 19:23 ` [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Rob Herring
2019-08-30 6:03 ` Chunfeng Yun
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