From: Gabriel Paubert <paubert@iram.es>
To: Segher Boessenkool <segher@kernel.crashing.org>
Cc: Christophe Leroy <christophe.leroy@c-s.fr>,
Alastair D'Silva <alastair@au1.ibm.com>,
David Hildenbrand <david@redhat.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-kernel@vger.kernel.org, Nicholas Piggin <npiggin@gmail.com>,
Mike Rapoport <rppt@linux.vnet.ibm.com>,
Paul Mackerras <paulus@samba.org>,
alastair@d-silva.org, Qian Cai <cai@lca.pw>,
Thomas Gleixner <tglx@linutronix.de>,
linuxppc-dev@lists.ozlabs.org,
Andrew Morton <akpm@linux-foundation.org>,
Allison Randal <allison@lohutok.net>
Subject: Re: [PATCH v2 3/6] powerpc: Convert flush_icache_range & friends to C
Date: Tue, 3 Sep 2019 22:11:21 +0200 [thread overview]
Message-ID: <20190903201121.GD3547@lt-gp.iram.es> (raw)
In-Reply-To: <20190903183157.GB9749@gate.crashing.org>
On Tue, Sep 03, 2019 at 01:31:57PM -0500, Segher Boessenkool wrote:
> On Tue, Sep 03, 2019 at 07:05:19PM +0200, Christophe Leroy wrote:
> > Le 03/09/2019 à 18:04, Segher Boessenkool a écrit :
> > >(Why are they separate though? It could just be one loop var).
> >
> > Yes it could just be a single loop var, but in that case it would have
> > to be reset at the start of the second loop, which means we would have
> > to pass 'addr' for resetting the loop anyway,
>
> Right, I noticed that after hitting send, as usual.
>
> > so I opted to do it
> > outside the inline asm by using to separate loop vars set to their
> > starting value outside the inline asm.
>
> The thing is, the way it is written now, it will get separate registers
> for each loop (with proper earlyclobbers added). Not that that really
> matters of course, it just feels wrong :-)
After "mtmsr %3", it is always possible to copy %0 to %3 and use it as
an address register for the second loop. One register less to allocate
for the compiler. Constraints of course have to be adjusted.
Gabriel
>
>
> Segher
next prev parent reply other threads:[~2019-09-03 20:23 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-03 5:23 [PATCH v2 0/6] powerpc: convert cache asm to C Alastair D'Silva
2019-09-03 5:23 ` [PATCH v2 1/6] powerpc: Allow flush_icache_range to work across ranges >4GB Alastair D'Silva
2019-09-14 7:46 ` Christophe Leroy
2019-09-16 3:25 ` Alastair D'Silva
2019-09-03 5:23 ` [PATCH v2 2/6] powerpc: define helpers to get L1 icache sizes Alastair D'Silva
2019-09-03 5:23 ` [PATCH v2 3/6] powerpc: Convert flush_icache_range & friends to C Alastair D'Silva
2019-09-03 6:08 ` Christophe Leroy
2019-09-03 11:25 ` Michael Ellerman
2019-09-04 3:23 ` Alastair D'Silva
2019-09-04 13:35 ` Segher Boessenkool
2019-09-03 13:04 ` Segher Boessenkool
2019-09-03 14:28 ` Christophe Leroy
2019-09-03 16:04 ` Segher Boessenkool
2019-09-03 17:05 ` Christophe Leroy
2019-09-03 18:31 ` Segher Boessenkool
2019-09-03 20:11 ` Gabriel Paubert [this message]
2019-09-04 3:42 ` Alastair D'Silva
2019-09-04 3:36 ` Alastair D'Silva
2019-09-03 5:23 ` [PATCH v2 4/6] powerpc: Chunk calls to flush_dcache_range in arch_*_memory Alastair D'Silva
2019-09-03 6:19 ` Christophe Leroy
2019-09-03 6:25 ` Alastair D'Silva
2019-09-03 6:51 ` Christophe Leroy
2019-09-04 4:11 ` Alastair D'Silva
2019-09-03 5:23 ` [PATCH v2 5/6] powerpc: Remove 'extern' from func prototypes in cache headers Alastair D'Silva
2019-09-03 6:21 ` Christophe Leroy
2019-09-03 5:24 ` [PATCH v2 6/6] powerpc: Don't flush caches when adding memory Alastair D'Silva
2019-09-03 6:23 ` Christophe Leroy
2019-09-03 6:27 ` Alastair D'Silva
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