From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.0 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53901C43331 for ; Fri, 6 Sep 2019 14:24:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1BDA8205ED for ; Fri, 6 Sep 2019 14:24:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="gJhYEymz" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2394432AbfIFOY5 (ORCPT ); Fri, 6 Sep 2019 10:24:57 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:59678 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731142AbfIFOY4 (ORCPT ); Fri, 6 Sep 2019 10:24:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=/3kJslcsbLFpzXlWoY8tRFbsCSBonRCniOnFy3oERXU=; b=gJhYEymzraY57EbVrvakhHIUWv arbMFbEonMimoz0+VsPCJoCh4ykhpTdMavMdX/8Zjeo2h3qszYihuTy+u+l6Py1W+YWL8odC3lI+q jk9K4gg2kIaPhboA/dJDTK3oZyzWewdjW3PfHqKSlkZqPdIgAy7HWZ+ucQjQ6jTtZ2Qo=; Received: from andrew by vps0.lunn.ch with local (Exim 4.89) (envelope-from ) id 1i6FAM-0007mj-6u; Fri, 06 Sep 2019 16:24:46 +0200 Date: Fri, 6 Sep 2019 16:24:46 +0200 From: Andrew Lunn To: Jose Abreu Cc: Voon Weifeng , "David S. Miller" , Maxime Coquelin , "netdev@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Giuseppe Cavallaro , Alexandre Torgue , Ong Boon Leong Subject: Re: [PATCH v3 net-next] net: stmmac: Add support for MDIO interrupts Message-ID: <20190906142446.GA29611@lunn.ch> References: <1567685130-8153-1-git-send-email-weifeng.voon@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 06, 2019 at 01:31:14PM +0000, Jose Abreu wrote: > From: Voon Weifeng > Date: Sep/05/2019, 13:05:30 (UTC+00:00) > > > DW EQoS v5.xx controllers added capability for interrupt generation > > when MDIO interface is done (GMII Busy bit is cleared). > > This patch adds support for this interrupt on supported HW to avoid > > polling on GMII Busy bit. > > Better leave the enabling of this optional because the support for it is > also optional depending on the IP HW configuration. Hi Jose If there a register which indicates if this feature is part of the IP? Andrew