From: Rob Herring <robh@kernel.org>
To: Maciej Falkowski <m.falkowski@samsung.com>
Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, krzk@kernel.org,
mark.rutland@arm.com, m.szyprowski@samsung.com,
a.hajda@samsung.com
Subject: Re: [PATCH v3] dt-bindings: arm: samsung: Convert Samsung Exynos IOMMU H/W, System MMU to dt-schema
Date: Tue, 17 Sep 2019 14:21:13 -0500 [thread overview]
Message-ID: <20190917192113.GA26604@bogus> (raw)
In-Reply-To: <20190911110446.32058-1-m.falkowski@samsung.com>
On Wed, Sep 11, 2019 at 01:04:46PM +0200, Maciej Falkowski wrote:
> Convert Samsung Exynos IOMMU H/W, System Memory Management Unit
> to newer dt-schema format.
>
> Update clock description.
>
> Signed-off-by: Maciej Falkowski <m.falkowski@samsung.com>
> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
> Hi Krzysztof,
>
> Thank you for feedback.
>
> v3:
>
> - remove obsolete interrupts description and
> set its maxItems to one. There are some incompatible
> files which will be fixed with another patch.
>
> - clock-names pattern is changed to your more precise
> version. I also added option "pclk" + "aclk" as some
> bindings are also using it.
>
> Best regards,
> Maciej Falkowski
> ---
> .../bindings/iommu/samsung,sysmmu.txt | 67 -----------
> .../bindings/iommu/samsung,sysmmu.yaml | 112 ++++++++++++++++++
> 2 files changed, 112 insertions(+), 67 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt
> create mode 100644 Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml
> diff --git a/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml b/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml
> new file mode 100644
> index 000000000000..a8141d6c326a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml
> @@ -0,0 +1,112 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iommu/samsung,sysmmu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung Exynos IOMMU H/W, System MMU (System Memory Management Unit)
> +
> +maintainers:
> + - Marek Szyprowski <m.szyprowski@samsung.com>
> +
> +description: |+
> + Samsung's Exynos architecture contains System MMUs that enables scattered
> + physical memory chunks visible as a contiguous region to DMA-capable peripheral
> + devices like MFC, FIMC, FIMD, GScaler, FIMC-IS and so forth.
> +
> + System MMU is an IOMMU and supports identical translation table format to
> + ARMv7 translation tables with minimum set of page properties including access
> + permissions, shareability and security protection. In addition, System MMU has
> + another capabilities like L2 TLB or block-fetch buffers to minimize translation
> + latency.
> +
> + System MMUs are in many to one relation with peripheral devices, i.e. single
> + peripheral device might have multiple System MMUs (usually one for each bus
> + master), but one System MMU can handle transactions from only one peripheral
> + device. The relation between a System MMU and the peripheral device needs to be
> + defined in device node of the peripheral device.
> +
> + MFC in all Exynos SoCs and FIMD, M2M Scalers and G2D in Exynos5420 has 2 System
> + MMUs.
> + * MFC has one System MMU on its left and right bus.
> + * FIMD in Exynos5420 has one System MMU for window 0 and 4, the other system MMU
> + for window 1, 2 and 3.
> + * M2M Scalers and G2D in Exynos5420 has one System MMU on the read channel and
> + the other System MMU on the write channel.
> +
> + For information on assigning System MMU controller to its peripheral devices,
> + see generic IOMMU bindings.
> +
> +properties:
> + compatible:
> + const: samsung,exynos-sysmmu
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + minItems: 1
> + maxItems: 2
> +
> + clock-names:
> + oneOf:
> + - items:
> + - const: sysmmu
> + - items:
> + - const: sysmmu
> + - const: master
> + - items:
> + - const: aclk
> + - const: pclk
> + - items:
> + - const: pclk
> + - const: aclk
Sigh. I'd prefer you fix the order in whichever case is less common.
> + description: |
> + Should be "sysmmu" with optional "master"
> + or a pair "aclk" with "pclk".
No need to describe what the schema already says.
> +
> + "#iommu-cells":
> + const: 0
> +
> + power-domains:
> + $ref: /schemas/types.yaml#/definitions/phandle
No need to define common property types.
Just 'maxItems: 1' is enough.
> + description: |
> + Required if the System MMU is needed to gate its power.
> + Please refer to the following document:
> + Documentation/devicetree/bindings/power/pd-samsung.txt
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - "#iommu-cells"
> +
> +examples:
> + - |
> + gsc_0: gsc@13e00000 {
> + compatible = "samsung,exynos5-gsc";
> + reg = <0x13e00000 0x1000>;
> + interrupts = <0 85 0>;
> + power-domains = <&pd_gsc>;
> + clocks = <&clock 0>; // CLK_GSCL0
> + clock-names = "gscl";
> + iommus = <&sysmmu_gsc0>;
> + };
> +
> + sysmmu_gsc0: sysmmu@13e80000 {
This should be:
iommu@...
> + compatible = "samsung,exynos-sysmmu";
> + reg = <0x13E80000 0x1000>;
> + interrupt-parent = <&combiner>;
> + interrupts = <2 0>;
> + clock-names = "sysmmu", "master";
> + clocks = <&clock 0>, // CLK_SMMU_GSCL0
> + <&clock 0>; // CLK_GSCL0
> + power-domains = <&pd_gsc>;
> + #iommu-cells = <0>;
> + };
> +
> --
> 2.17.1
>
next prev parent reply other threads:[~2019-09-17 19:21 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20190909124206eucas1p13e4ffd50a3bbc6f390cb63f11034c34c@eucas1p1.samsung.com>
2019-09-09 12:41 ` [PATCH] dt-bindings: arm: samsung: Convert Samsung Exynos IOMMU H/W, System MMU to dt-schema Maciej Falkowski
2019-09-09 13:18 ` Krzysztof Kozlowski
[not found] ` <CGME20190910155240eucas1p26b343fd58e0f7b7fbe8dae06fe565de7@eucas1p2.samsung.com>
2019-09-10 15:52 ` [PATCH v2] " Maciej Falkowski
2019-09-11 6:26 ` Krzysztof Kozlowski
[not found] ` <CGME20190911110500eucas1p2e1304a19e2e75ee43d80fcdc3b871237@eucas1p2.samsung.com>
2019-09-11 11:04 ` [PATCH v3] " Maciej Falkowski
2019-09-11 11:36 ` Krzysztof Kozlowski
2019-09-11 11:57 ` Marek Szyprowski
2019-09-11 12:25 ` Krzysztof Kozlowski
2019-09-17 19:21 ` Rob Herring [this message]
[not found] ` <CGME20190919132002eucas1p19ceac65f49939be3152affb4d6a426a1@eucas1p1.samsung.com>
2019-09-19 13:19 ` [PATCH v4] dt-bindings: iommu: " Marek Szyprowski
[not found] ` <CGME20190919135115eucas1p2e1c9c090c5a75211e5a137c598721287@eucas1p2.samsung.com>
2019-09-19 13:50 ` [PATCH] arm64: dts: exynos: Exynos5433: swap clock order of sysmmu Marek Szyprowski
2019-10-01 19:14 ` Krzysztof Kozlowski
2019-09-27 16:20 ` [PATCH v4] dt-bindings: iommu: Convert Samsung Exynos IOMMU H/W, System MMU to dt-schema Rob Herring
[not found] ` <CGME20190911133317eucas1p27f0312f5cd3e3c988399f65b07150e42@eucas1p2.samsung.com>
2019-09-11 13:33 ` [PATCH] dt-bindings: arm: samsung: Exynos 3250: iommu: remove obsolete IRQ lines Maciej Falkowski
[not found] ` <CGME20190912151829eucas1p216ca28e56f62e7f484c46ce30581200a@eucas1p2.samsung.com>
2019-09-12 15:17 ` [PATCH v2] ARM: dts: exynos: " Maciej Falkowski
2019-09-12 15:23 ` Krzysztof Kozlowski
[not found] ` <CGME20190919134622eucas1p1947abc201f86d414bd0b0635f2d91cfe@eucas1p1.samsung.com>
2019-09-19 13:45 ` [PATCH v2 resend] " Marek Szyprowski
2019-10-02 15:48 ` Krzysztof Kozlowski
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