From: Shawn Guo <shawnguo@kernel.org>
To: Anson Huang <Anson.Huang@nxp.com>
Cc: mturquette@baylibre.com, sboyd@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, leonard.crestez@nxp.com, abel.vesa@nxp.com,
peng.fan@nxp.com, ping.bai@nxp.com, chen.fang@nxp.com,
shengjiu.wang@nxp.com, aisheng.dong@nxp.com,
sfr@canb.auug.org.au, l.stach@pengutronix.de,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Linux-imx@nxp.com
Subject: Re: [PATCH V2 1/2] clk: imx8mm: Move 1443X/1416X PLL clock structure to common place
Date: Sun, 6 Oct 2019 10:16:33 +0800 [thread overview]
Message-ID: <20191006021632.GM7150@dragon> (raw)
In-Reply-To: <1567776846-6373-1-git-send-email-Anson.Huang@nxp.com>
On Fri, Sep 06, 2019 at 09:34:05AM -0400, Anson Huang wrote:
> Many i.MX8M SoCs use same 1443X/1416X PLL, such as i.MX8MM,
> i.MX8MN and later i.MX8M SoCs, moving these PLL definitions
> to pll14xx driver can save a lot of duplicated code on each
> platform.
>
> Meanwhile, no need to define PLL clock structure for every
> module which uses same type of PLL, e.g., audio/video/dram use
> 1443X PLL, arm/gpu/vpu/sys use 1416X PLL, define 2 PLL clock
> structure for each group is enough.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Applied both, thanks.
prev parent reply other threads:[~2019-10-06 2:17 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-06 13:34 [PATCH V2 1/2] clk: imx8mm: Move 1443X/1416X PLL clock structure to common place Anson Huang
2019-09-06 13:34 ` [PATCH V2 2/2] clk: imx8mn: Use common 1443X/1416X PLL clock structure Anson Huang
2019-09-06 13:56 ` [PATCH V2 1/2] clk: imx8mm: Move 1443X/1416X PLL clock structure to common place Leonard Crestez
2019-09-20 1:27 ` Anson Huang
2019-09-20 16:55 ` Stephen Boyd
2019-10-06 2:16 ` Shawn Guo [this message]
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