From: Dave Martin <Dave.Martin@arm.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: "Paul Elliott" <paul.elliott@arm.com>,
"Peter Zijlstra" <peterz@infradead.org>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will.deacon@arm.com>,
"Yu-cheng Yu" <yu-cheng.yu@intel.com>,
"Amit Kachhap" <amit.kachhap@arm.com>,
"Vincenzo Frascino" <vincenzo.frascino@arm.com>,
linux-arch@vger.kernel.org,
"Eugene Syromiatnikov" <esyr@redhat.com>,
"Szabolcs Nagy" <szabolcs.nagy@arm.com>,
"H.J. Lu" <hjl.tools@gmail.com>,
"Andrew Jones" <drjones@redhat.com>,
"Kees Cook" <keescook@chromium.org>,
"Arnd Bergmann" <arnd@arndb.de>, "Jann Horn" <jannh@google.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Kristina Martšenko" <kristina.martsenko@arm.com>,
"Mark Brown" <broonie@kernel.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
linux-arm-kernel@lists.infradead.org,
"Florian Weimer" <fweimer@redhat.com>,
linux-kernel@vger.kernel.org, "Sudakshina Das" <sudi.das@arm.com>
Subject: Re: [PATCH v2 09/12] arm64: traps: Fix inconsistent faulting instruction skipping
Date: Tue, 15 Oct 2019 16:21:09 +0100 [thread overview]
Message-ID: <20191015152108.GX27757@arm.com> (raw)
In-Reply-To: <20191011152453.GF33537@lakrids.cambridge.arm.com>
On Fri, Oct 11, 2019 at 04:24:53PM +0100, Mark Rutland wrote:
> On Thu, Oct 10, 2019 at 07:44:37PM +0100, Dave Martin wrote:
> > Correct skipping of an instruction on AArch32 works a bit
> > differently from AArch64, mainly due to the different CPSR/PSTATE
> > semantics.
> >
> > There have been various attempts to get this right. Currenty
> > arm64_skip_faulting_instruction() mostly does the right thing, but
> > does not advance the IT state machine for the AArch32 case.
> >
> > arm64_compat_skip_faulting_instruction() handles the IT state
> > machine but is local to traps.c, and porting other code to use it
> > will make a mess since there are some call sites that apply for
> > both the compat and native cases.
> >
> > Since manual instruction skipping implies a trap, it's a relatively
> > slow path.
> >
> > So, make arm64_skip_faulting_instruction() handle both compat and
> > native, and get rid of the arm64_compat_skip_faulting_instruction()
> > special case.
> >
> > Fixes: 32a3e635fb0e ("arm64: compat: Add CNTFRQ trap handler")
> > Fixes: 1f1c014035a8 ("arm64: compat: Add condition code checks and IT advance")
> > Fixes: 6436beeee572 ("arm64: Fix single stepping in kernel traps")
> > Fixes: bd35a4adc413 ("arm64: Port SWP/SWPB emulation support from arm")
> > Signed-off-by: Dave Martin <Dave.Martin@arm.com>
> > ---
> > arch/arm64/kernel/traps.c | 18 ++++++++----------
> > 1 file changed, 8 insertions(+), 10 deletions(-)
>
> This looks good to me; it's certainly easier to reason about.
>
> I couldn't spot a place where we do the wrong thing today, given AFAICT
> all the instances in arch/arm64/kernel/armv8_deprecated.c would be
> UNPREDICTABLE within an IT block.
>
> It might be worth calling out an example in the commit message to
> justify the fixes tags.
IIRC I found no bug here; rather we have pointlessly fragmented code,
so I followed the "if fixing the same bug in multiple places, merge
those places so you need only fix it in one place next time" rule.
Since arm64_skip_faulting_instruction() is most of the way to being
generically usable anyway, this series merges all the special-case
handling into it.
I could add something like
--8<--
This allows this fiddly operation to be maintained in a single
place rather than trying to maintain fragmented versions spread
around arch/arm64.
-->8--
Any good?
Cheers
---Dave
[...]
> >
> > diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
> > index 15e3c4f..44c91d4 100644
> > --- a/arch/arm64/kernel/traps.c
> > +++ b/arch/arm64/kernel/traps.c
> > @@ -268,6 +268,8 @@ void arm64_notify_die(const char *str, struct pt_regs *regs,
> > }
> > }
> >
> > +static void advance_itstate(struct pt_regs *regs);
> > +
> > void arm64_skip_faulting_instruction(struct pt_regs *regs, unsigned long size)
> > {
> > regs->pc += size;
> > @@ -278,6 +280,9 @@ void arm64_skip_faulting_instruction(struct pt_regs *regs, unsigned long size)
> > */
> > if (user_mode(regs))
> > user_fastforward_single_step(current);
> > +
> > + if (regs->pstate & PSR_MODE32_BIT)
> > + advance_itstate(regs);
> > }
> >
> > static LIST_HEAD(undef_hook);
> > @@ -629,19 +634,12 @@ static void advance_itstate(struct pt_regs *regs)
> > compat_set_it_state(regs, it);
> > }
> >
> > -static void arm64_compat_skip_faulting_instruction(struct pt_regs *regs,
> > - unsigned int sz)
> > -{
> > - advance_itstate(regs);
> > - arm64_skip_faulting_instruction(regs, sz);
> > -}
> > -
> > static void compat_cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
> > {
> > int reg = (esr & ESR_ELx_CP15_32_ISS_RT_MASK) >> ESR_ELx_CP15_32_ISS_RT_SHIFT;
> >
> > pt_regs_write_reg(regs, reg, arch_timer_get_rate());
> > - arm64_compat_skip_faulting_instruction(regs, 4);
> > + arm64_skip_faulting_instruction(regs, 4);
> > }
> >
> > static const struct sys64_hook cp15_32_hooks[] = {
> > @@ -661,7 +659,7 @@ static void compat_cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
> >
> > pt_regs_write_reg(regs, rt, lower_32_bits(val));
> > pt_regs_write_reg(regs, rt2, upper_32_bits(val));
> > - arm64_compat_skip_faulting_instruction(regs, 4);
> > + arm64_skip_faulting_instruction(regs, 4);
> > }
> >
> > static const struct sys64_hook cp15_64_hooks[] = {
> > @@ -682,7 +680,7 @@ asmlinkage void __exception do_cp15instr(unsigned int esr, struct pt_regs *regs)
> > * There is no T16 variant of a CP access, so we
> > * always advance PC by 4 bytes.
> > */
> > - arm64_compat_skip_faulting_instruction(regs, 4);
> > + arm64_skip_faulting_instruction(regs, 4);
> > return;
> > }
> >
> > --
> > 2.1.4
> >
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-10-15 15:21 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-10 18:44 [PATCH v2 00/12] arm64: ARMv8.5-A: Branch Target Identification support Dave Martin
2019-10-10 18:44 ` [PATCH v2 01/12] ELF: UAPI and Kconfig additions for ELF program properties Dave Martin
2019-10-10 18:44 ` [PATCH v2 02/12] ELF: Add ELF program property parsing support Dave Martin
2019-10-10 18:44 ` [PATCH v2 03/12] mm: Reserve asm-generic prot flag 0x10 for arch use Dave Martin
2019-10-10 18:44 ` [PATCH v2 04/12] arm64: docs: cpu-feature-registers: Document ID_AA64PFR1_EL1 Dave Martin
2019-10-11 13:19 ` Alex Bennée
2019-10-11 14:51 ` Dave Martin
2019-10-21 19:18 ` Mark Brown
2019-10-22 10:32 ` Will Deacon
2019-10-10 18:44 ` [PATCH v2 05/12] arm64: Basic Branch Target Identification support Dave Martin
2019-10-11 15:06 ` [FIXUP 0/2] Fixups to patch 5 Dave Martin
2019-10-11 15:06 ` [FIXUP 1/2] squash! arm64: Basic Branch Target Identification support Dave Martin
2019-10-11 15:06 ` [FIXUP 2/2] " Dave Martin
2019-10-11 15:10 ` [PATCH v2 05/12] " Mark Rutland
2019-10-11 15:25 ` Richard Henderson
2019-10-11 15:32 ` Dave Martin
2019-10-11 15:40 ` Mark Rutland
2019-10-11 15:44 ` Dave Martin
2019-10-11 16:01 ` Dave Martin
2019-10-11 16:42 ` Dave Martin
2019-10-18 11:05 ` Mark Rutland
2019-10-18 13:36 ` Dave Martin
2019-10-11 17:20 ` Dave Martin
2019-10-18 11:10 ` Mark Rutland
2019-10-18 13:37 ` Dave Martin
2019-10-18 11:16 ` Mark Rutland
2019-10-18 13:40 ` Dave Martin
2019-10-10 18:44 ` [PATCH v2 06/12] elf: Allow arch to tweak initial mmap prot flags Dave Martin
2019-10-10 18:44 ` [PATCH v2 07/12] arm64: elf: Enable BTI at exec based on ELF program properties Dave Martin
2019-10-10 18:44 ` [PATCH v2 08/12] arm64: BTI: Decode BYTPE bits when printing PSTATE Dave Martin
2019-10-11 15:31 ` Richard Henderson
2019-10-11 15:33 ` Dave Martin
2019-10-10 18:44 ` [PATCH v2 09/12] arm64: traps: Fix inconsistent faulting instruction skipping Dave Martin
2019-10-11 15:24 ` Mark Rutland
2019-10-15 15:21 ` Dave Martin [this message]
2019-10-15 16:42 ` Mark Rutland
2019-10-15 16:49 ` Dave Martin
2019-10-18 16:40 ` Dave Martin
2019-10-22 11:09 ` Robin Murphy
2019-10-10 18:44 ` [PATCH v2 10/12] arm64: traps: Shuffle code to eliminate forward declarations Dave Martin
2019-10-10 18:44 ` [PATCH v2 11/12] arm64: BTI: Reset BTYPE when skipping emulated instructions Dave Martin
2019-10-11 14:21 ` Mark Rutland
2019-10-11 14:47 ` Dave Martin
2019-10-18 11:04 ` Mark Rutland
2019-10-18 14:49 ` Dave Martin
2019-10-10 18:44 ` [PATCH v2 12/12] KVM: " Dave Martin
2019-10-11 14:24 ` Mark Rutland
2019-10-11 14:44 ` Dave Martin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191015152108.GX27757@arm.com \
--to=dave.martin@arm.com \
--cc=amit.kachhap@arm.com \
--cc=arnd@arndb.de \
--cc=broonie@kernel.org \
--cc=catalin.marinas@arm.com \
--cc=drjones@redhat.com \
--cc=esyr@redhat.com \
--cc=fweimer@redhat.com \
--cc=hjl.tools@gmail.com \
--cc=jannh@google.com \
--cc=keescook@chromium.org \
--cc=kristina.martsenko@arm.com \
--cc=linux-arch@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=paul.elliott@arm.com \
--cc=peterz@infradead.org \
--cc=richard.henderson@linaro.org \
--cc=sudi.das@arm.com \
--cc=szabolcs.nagy@arm.com \
--cc=tglx@linutronix.de \
--cc=vincenzo.frascino@arm.com \
--cc=will.deacon@arm.com \
--cc=yu-cheng.yu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).