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From: Jerome Glisse <jglisse@redhat.com>
To: Jean-Philippe Brucker <jean-philippe@linaro.org>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>,
	francois.ozog@linaro.org,
	Herbert Xu <herbert@gondor.apana.org.au>,
	Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Zaibo Xu <xuzaibo@huawei.com>,
	ilias.apalodimas@linaro.org, linux-kernel@vger.kernel.org,
	linux-crypto@vger.kernel.org, Wangzhou <wangzhou1@hisilicon.com>,
	grant.likely@arm.com,
	"haojian . zhuang" <haojian.zhuang@linaro.org>,
	Kenneth Lee <liguozhu@hisilicon.com>,
	linux-accelerators@lists.ozlabs.org,
	kenneth-lee-2012@foxmail.com
Subject: Re: [PATCH v6 2/3] uacce: add uacce driver
Date: Wed, 23 Oct 2019 12:58:14 -0400	[thread overview]
Message-ID: <20191023165814.GB4163@redhat.com> (raw)
In-Reply-To: <20191016172802.GA1533448@lophozonia>

On Wed, Oct 16, 2019 at 07:28:02PM +0200, Jean-Philippe Brucker wrote:
[...]

> > +static struct uacce_qfile_region *
> > +uacce_create_region(struct uacce_queue *q, struct vm_area_struct *vma,
> > +		    enum uacce_qfrt type, unsigned int flags)
> > +{
> > +	struct uacce_qfile_region *qfr;
> > +	struct uacce_device *uacce = q->uacce;
> > +	unsigned long vm_pgoff;
> > +	int ret = -ENOMEM;
> > +
> > +	qfr = kzalloc(sizeof(*qfr), GFP_ATOMIC);
> > +	if (!qfr)
> > +		return ERR_PTR(-ENOMEM);
> > +
> > +	qfr->type = type;
> > +	qfr->flags = flags;
> > +	qfr->iova = vma->vm_start;
> > +	qfr->nr_pages = vma_pages(vma);
> > +
> > +	if (vma->vm_flags & VM_READ)
> > +		qfr->prot |= IOMMU_READ;
> > +
> > +	if (vma->vm_flags & VM_WRITE)
> > +		qfr->prot |= IOMMU_WRITE;
> > +
> > +	if (flags & UACCE_QFRF_SELFMT) {
> > +		if (!uacce->ops->mmap) {
> > +			ret = -EINVAL;
> > +			goto err_with_qfr;
> > +		}
> > +
> > +		ret = uacce->ops->mmap(q, vma, qfr);
> > +		if (ret)
> > +			goto err_with_qfr;
> > +		return qfr;
> > +	}
> 
> I wish the SVA and !SVA paths were less interleaved. Both models are
> fundamentally different:
> 
> * Without SVA you cannot share the device between multiple processes. All
>   DMA mappings are in the "main", non-PASID address space of the device.
> 
>   Note that process isolation without SVA could be achieved with the
>   auxiliary domains IOMMU API (introduced primarily for vfio-mdev) but
>   this is not the model chosen here.
> 
> * With SVA you can share the device between multiple processes. But if the
>   process can somehow program its portion of the device to access the main
>   address space, you loose isolation. Only the kernel must be able to
>   program and access the main address space.
> 
> When interleaving both code paths it's easy to make a mistake and loose
> this isolation. Although I think this code is correct, it took me some
> time to understand that we never end up calling dma_alloc or iommu_map
> when using SVA. Might be worth at least adding a check that if
> UACCE_DEV_SVA, then we never end up in the bottom part of this function.

I would go even further, just remove the DMA path as it is not use.
But yes at bare minimum it needs to be completely separate to avoid
confusion.


[...]


> > +static int uacce_fops_open(struct inode *inode, struct file *filep)
> > +{
> > +	struct uacce_queue *q;
> > +	struct iommu_sva *handle = NULL;
> > +	struct uacce_device *uacce;
> > +	int ret;
> > +	int pasid = 0;
> > +
> > +	uacce = idr_find(&uacce_idr, iminor(inode));
> > +	if (!uacce)
> > +		return -ENODEV;
> > +
> > +	if (!try_module_get(uacce->pdev->driver->owner))
> > +		return -ENODEV;
> > +
> > +	ret = uacce_dev_open_check(uacce);
> > +	if (ret)
> > +		goto out_with_module;
> > +
> > +	if (uacce->flags & UACCE_DEV_SVA) {
> > +		handle = iommu_sva_bind_device(uacce->pdev, current->mm, NULL);
> > +		if (IS_ERR(handle))
> > +			goto out_with_module;
> > +		pasid = iommu_sva_get_pasid(handle);
> 
> We need to register an mm_exit callback. Once we return, userspace will
> start running jobs on the accelerator. If the process is killed while the
> accelerator is running, the mm_exit callback tells the device driver to
> stop using this PASID (stop_queue()), so that it can be reallocated for
> another process.
> 
> Implementing this with the right locking and ordering can be tricky. I'll
> try to implement the callback and test it on the device this week.

It already exist it is call mmu notifier, you can register an mmu notifier
and get callback once the mm exit.

Cheers,
Jérôme


  parent reply	other threads:[~2019-10-23 16:58 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-16  8:34 [PATCH v6 0/3] Add uacce module for Accelerator Zhangfei Gao
2019-10-16  8:34 ` [PATCH v6 1/3] uacce: Add documents for uacce Zhangfei Gao
2019-10-16 18:36   ` Jean-Philippe Brucker
     [not found]     ` <5da81d06.1c69fb81.395d6.c080SMTPIN_ADDED_BROKEN@mx.google.com>
2019-10-21 13:34       ` Jean-Philippe Brucker
2019-10-16  8:34 ` [PATCH v6 2/3] uacce: add uacce driver Zhangfei Gao
2019-10-16 17:28   ` Jean-Philippe Brucker
     [not found]     ` <5da9a9cd.1c69fb81.9f8e8.60faSMTPIN_ADDED_BROKEN@mx.google.com>
2019-10-23  7:42       ` Jean-Philippe Brucker
2019-10-23 17:03         ` Jerome Glisse
     [not found]         ` <5db25e56.1c69fb81.4fe57.380cSMTPIN_ADDED_BROKEN@mx.google.com>
2019-10-25  7:35           ` Jean-Philippe Brucker
2019-10-23 16:58     ` Jerome Glisse [this message]
     [not found]       ` <5db257c6.1c69fb81.bfe34.a4afSMTPIN_ADDED_BROKEN@mx.google.com>
2019-10-25  7:04         ` Jean-Philippe Brucker
2019-10-22 18:49   ` Jerome Glisse
     [not found]     ` <20191024064129.GB17723@kllp10>
2019-10-24 14:17       ` Jerome Glisse
2019-10-25  7:01     ` zhangfei
2019-10-16  8:34 ` [PATCH v6 3/3] crypto: hisilicon - register zip engine to uacce Zhangfei Gao

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