From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D79FBCA9EA0 for ; Fri, 25 Oct 2019 11:14:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A8A4D20867 for ; Fri, 25 Oct 2019 11:14:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2439767AbfJYLOY (ORCPT ); Fri, 25 Oct 2019 07:14:24 -0400 Received: from mx1.unisoc.com ([222.66.158.135]:38588 "EHLO SHSQR01.spreadtrum.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2439123AbfJYLOX (ORCPT ); Fri, 25 Oct 2019 07:14:23 -0400 Received: from ig2.spreadtrum.com (bjmbx01.spreadtrum.com [10.0.64.7]) by SHSQR01.spreadtrum.com with ESMTPS id x9PBDrCR066405 (version=TLSv1 cipher=AES256-SHA bits=256 verify=NO); Fri, 25 Oct 2019 19:13:53 +0800 (CST) (envelope-from Chunyan.Zhang@unisoc.com) Received: from localhost (10.0.74.79) by BJMBX01.spreadtrum.com (10.0.64.7) with Microsoft SMTP Server (TLS) id 15.0.847.32; Fri, 25 Oct 2019 19:13:53 +0800 From: Chunyan Zhang To: Stephen Boyd , Michael Turquette , Rob Herring , Mark Rutland CC: , , , Orson Zhai , Baolin Wang , Chunyan Zhang , Chunyan Zhang Subject: [PATCH 0/5] Add clocks for Unisoc's SC9863A Date: Fri, 25 Oct 2019 19:13:33 +0800 Message-ID: <20191025111338.27324-1-chunyan.zhang@unisoc.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.0.74.79] X-ClientProxiedBy: SHCAS03.spreadtrum.com (10.0.1.207) To BJMBX01.spreadtrum.com (10.0.64.7) X-MAIL: SHSQR01.spreadtrum.com x9PBDrCR066405 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add SC9863A specific clock driver and devicetree bindings for it. Also this patchset added support gate clock for pll which need to wait a certain time for stable after being switched on. Chunyan Zhang (4): dt-bindings: clk: sprd: rename the common file name sprd.txt to SoC specific dt-bindings: clk: sprd: add bindings for sc9863a clock controller clk: sprd: Add dt-bindings include file for SC9863A clk: sprd: add clocks support for SC9863A Xiaolong Zhang (1): clk: sprd: add gate for pll clocks .../clock/{sprd.txt => sprd,sc9860-clk.txt} | 2 +- .../bindings/clock/sprd,sc9863a-clk.txt | 59 + drivers/clk/sprd/Kconfig | 8 + drivers/clk/sprd/Makefile | 1 + drivers/clk/sprd/gate.c | 19 + drivers/clk/sprd/gate.h | 21 +- drivers/clk/sprd/sc9863a-clk.c | 1711 +++++++++++++++++ include/dt-bindings/clock/sprd,sc9863a-clk.h | 353 ++++ 8 files changed, 2171 insertions(+), 3 deletions(-) rename Documentation/devicetree/bindings/clock/{sprd.txt => sprd,sc9860-clk.txt} (98%) create mode 100644 Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.txt create mode 100644 drivers/clk/sprd/sc9863a-clk.c create mode 100644 include/dt-bindings/clock/sprd,sc9863a-clk.h -- 2.20.1