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[198.145.64.163]) by smtp.gmail.com with ESMTPSA id y129sm12883990pgb.28.2019.10.28.12.57.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 12:57:43 -0700 (PDT) Date: Mon, 28 Oct 2019 12:57:42 -0700 From: Kees Cook To: Mark Rutland Cc: Sami Tolvanen , Will Deacon , Catalin Marinas , Steven Rostedt , Masami Hiramatsu , Ard Biesheuvel , Dave Martin , Laura Abbott , Nick Desaulniers , Jann Horn , Miguel Ojeda , Masahiro Yamada , clang-built-linux , Kernel Hardening , linux-arm-kernel , LKML Subject: Re: [PATCH v2 05/17] add support for Clang's Shadow Call Stack (SCS) Message-ID: <201910281250.25FBA8533@keescook> References: <20191018161033.261971-1-samitolvanen@google.com> <20191024225132.13410-1-samitolvanen@google.com> <20191024225132.13410-6-samitolvanen@google.com> <20191025105643.GD40270@lakrids.cambridge.arm.com> <20191028163532.GA52213@lakrids.cambridge.arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191028163532.GA52213@lakrids.cambridge.arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Oct 28, 2019 at 04:35:33PM +0000, Mark Rutland wrote: > On Fri, Oct 25, 2019 at 01:49:21PM -0700, Sami Tolvanen wrote: > > To keep the address of the currently active shadow stack out of > > memory, the arm64 implementation clears this field when it loads x18 > > and saves the current value before a context switch. The generic code > > doesn't expect the arch code to necessarily do so, but does allow it. > > This requires us to use __scs_base() when accessing the base pointer > > and to reset it in idle tasks before they're reused, hence > > scs_task_reset(). > > Ok. That'd be worth a comment somewhere, since it adds a number of > things which would otherwise be unnecessary. > > IIUC this assumes an adversary who knows the address of a task's > thread_info, and has an arbitrary-read (to extract the SCS base from > thead_info) and an arbitrary-write (to modify the SCS area). > > Assuming that's the case, I don't think this buys much. If said > adversary controls two userspace threads A and B, they only need to wait > until A is context-switched out or in userspace, and read A's SCS base > using B. > > Given that, I'd rather always store the SCS base in the thread_info, and > simplify the rest of the code manipulating it. I'd like to keep this as-is since it provides a temporal protection. Having arbitrary kernel read and write at arbitrary time is a very powerful attack primitive, and is, IMO, not very common. Many attacks tend to be chains of bugs that give attackers narrow visibility in to the kernel at specific moments. I would say this design is more about stopping "current" from dumping thread_info (as there are many more opportunities for current to see its own thread_info compared to arbitrary addresses or another task's thread_info). As such, I think it's a reasonable precaution to take. -- Kees Cook