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From: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-sgx@vger.kernel.org
Cc: akpm@linux-foundation.org, dave.hansen@intel.com,
	sean.j.christopherson@intel.com, nhorman@redhat.com,
	npmccallum@redhat.com, serge.ayoun@intel.com,
	shay.katz-zamir@intel.com, haitao.huang@intel.com,
	andriy.shevchenko@linux.intel.com, tglx@linutronix.de,
	kai.svahn@intel.com, bp@alien8.de, josh@joshtriplett.org,
	luto@kernel.org, kai.huang@intel.com, rientjes@google.com,
	cedric.xing@intel.com, puiterwijk@redhat.com,
	Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Subject: [PATCH v23 10/24] x86/sgx: Add sgx_einit() for wrapping ENCLS[EINIT]
Date: Mon, 28 Oct 2019 23:03:10 +0200	[thread overview]
Message-ID: <20191028210324.12475-11-jarkko.sakkinen@linux.intel.com> (raw)
In-Reply-To: <20191028210324.12475-1-jarkko.sakkinen@linux.intel.com>

From: Sean Christopherson <sean.j.christopherson@intel.com>

Enclaves are SGX hosted measured and signed software entities. ENCLS[EINIT]
leaf function checks that the enclave has a legit signed measurement and
transforms the enclave to the state ready for execution. The signed
measurement is provided by the caller in the form of SIGSTRUCT data
structure [1].

Wrap ENCLS[EINIT] into sgx_einit(). Set MSR_IA32_SGXLEPUBKEYHASH* MSRs to
match the public key contained in the SIGSTRUCT [2]. This sets Linux to
enforce a policy where the provided public key is as long as the signed
measurement matches the enclave contents in memory.

Add a per-cpu cache to avoid unnecessary reads and write to the MSRs
as they are expensive operations.

[1] Intel SDM: 37.1.3 ENCLAVE SIGNATURE STRUCTURE (SIGSTRUCT)
[2] Intel SDM: 38.1.4 Intel SGX Launch Control Configuration

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Co-developed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
---
 arch/x86/kernel/cpu/sgx/Makefile |  1 +
 arch/x86/kernel/cpu/sgx/encls.c  | 57 ++++++++++++++++++++++++++++++++
 arch/x86/kernel/cpu/sgx/encls.h  |  3 ++
 3 files changed, 61 insertions(+)
 create mode 100644 arch/x86/kernel/cpu/sgx/encls.c

diff --git a/arch/x86/kernel/cpu/sgx/Makefile b/arch/x86/kernel/cpu/sgx/Makefile
index 2dec75916a5e..874492d9e3bd 100644
--- a/arch/x86/kernel/cpu/sgx/Makefile
+++ b/arch/x86/kernel/cpu/sgx/Makefile
@@ -1,3 +1,4 @@
 obj-y += \
+	encls.o \
 	main.o \
 	reclaim.o
diff --git a/arch/x86/kernel/cpu/sgx/encls.c b/arch/x86/kernel/cpu/sgx/encls.c
new file mode 100644
index 000000000000..44291062967a
--- /dev/null
+++ b/arch/x86/kernel/cpu/sgx/encls.c
@@ -0,0 +1,57 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+// Copyright(c) 2016-19 Intel Corporation.
+
+#include <asm/cpufeature.h>
+#include <asm/traps.h>
+#include "encls.h"
+#include "sgx.h"
+
+/* A per-cpu cache for the last known values of IA32_SGXLEPUBKEYHASHx MSRs. */
+static DEFINE_PER_CPU(u64 [4], sgx_lepubkeyhash_cache);
+
+static void sgx_update_lepubkeyhash_msrs(u64 *lepubkeyhash, bool enforce)
+{
+	u64 *cache;
+	int i;
+
+	cache = per_cpu(sgx_lepubkeyhash_cache, smp_processor_id());
+	for (i = 0; i < 4; i++) {
+		if (enforce || (lepubkeyhash[i] != cache[i])) {
+			wrmsrl(MSR_IA32_SGXLEPUBKEYHASH0 + i, lepubkeyhash[i]);
+			cache[i] = lepubkeyhash[i];
+		}
+	}
+}
+
+/**
+ * sgx_einit - initialize an enclave
+ * @sigstruct:		a pointer a SIGSTRUCT
+ * @token:		a pointer an EINITTOKEN (optional)
+ * @secs:		a pointer a SECS
+ * @lepubkeyhash:	the desired value for IA32_SGXLEPUBKEYHASHx MSRs
+ *
+ * Execute ENCLS[EINIT], writing the IA32_SGXLEPUBKEYHASHx MSRs according
+ * to @lepubkeyhash (if possible and necessary).
+ *
+ * Return:
+ *   0 on success,
+ *   -errno or SGX error on failure
+ */
+int sgx_einit(struct sgx_sigstruct *sigstruct, struct sgx_einittoken *token,
+	      struct sgx_epc_page *secs, u64 *lepubkeyhash)
+{
+	int ret;
+
+	if (!boot_cpu_has(X86_FEATURE_SGX_LC))
+		return __einit(sigstruct, token, sgx_epc_addr(secs));
+
+	preempt_disable();
+	sgx_update_lepubkeyhash_msrs(lepubkeyhash, false);
+	ret = __einit(sigstruct, token, sgx_epc_addr(secs));
+	if (ret == SGX_INVALID_EINITTOKEN) {
+		sgx_update_lepubkeyhash_msrs(lepubkeyhash, true);
+		ret = __einit(sigstruct, token, sgx_epc_addr(secs));
+	}
+	preempt_enable();
+	return ret;
+}
diff --git a/arch/x86/kernel/cpu/sgx/encls.h b/arch/x86/kernel/cpu/sgx/encls.h
index d6381e4f6eb2..af94bbfe4cf6 100644
--- a/arch/x86/kernel/cpu/sgx/encls.h
+++ b/arch/x86/kernel/cpu/sgx/encls.h
@@ -248,4 +248,7 @@ static inline int __ewb(struct sgx_pageinfo *pginfo, void *addr,
 	return __encls_ret_3(EWB, pginfo, addr, va);
 }
 
+int sgx_einit(struct sgx_sigstruct *sigstruct, struct sgx_einittoken *token,
+	      struct sgx_epc_page *secs, u64 *lepubkeyhash);
+
 #endif /* _X86_ENCLS_H */
-- 
2.20.1


  parent reply	other threads:[~2019-10-28 21:05 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-28 21:03 [PATCH v23 00/24] Intel SGX foundations Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 01/24] x86/sgx: Update MAINTAINERS Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 02/24] x86/cpufeatures: x86/msr: Add Intel SGX hardware bits Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 03/24] x86/cpufeatures: x86/msr: Intel SGX Launch Control " Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 04/24] x86/mm: x86/sgx: Signal SIGSEGV with PF_SGX Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 05/24] x86/sgx: Add SGX microarchitectural data structures Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 06/24] x86/sgx: Add wrappers for ENCLS leaf functions Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 07/24] x86/cpu/intel: Detect SGX supprt Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 08/24] x86/sgx: Enumerate and track EPC sections Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 09/24] x86/sgx: Add functions to allocate and free EPC pages Jarkko Sakkinen
2019-10-28 21:03 ` Jarkko Sakkinen [this message]
2019-10-28 21:03 ` [PATCH v23 11/24] mm: Introduce vm_ops->may_mprotect() Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 12/24] x86/sgx: Linux Enclave Driver Jarkko Sakkinen
2019-10-29  9:29   ` Jarkko Sakkinen
2019-10-30  9:30     ` Sean Christopherson
2019-10-31 21:12       ` Jarkko Sakkinen
2019-11-05 11:11         ` Jarkko Sakkinen
2019-11-08  8:20           ` Jarkko Sakkinen
2019-10-30 13:45   ` Stephen Smalley
2019-10-31 21:17     ` Jarkko Sakkinen
2019-11-01 13:16       ` Stephen Smalley
2019-11-01 13:28         ` Stephen Smalley
2019-11-01 15:32           ` Sean Christopherson
2019-11-01 17:16             ` Stephen Smalley
2019-11-08  8:05               ` Jarkko Sakkinen
2019-11-28 18:24   ` Greg KH
2019-12-06 20:38     ` Jarkko Sakkinen
2019-12-07  8:09       ` Greg KH
2019-12-09 19:57         ` Jarkko Sakkinen
2019-12-23 11:01           ` Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 13/24] selftests/x86: Recurse into subdirectories Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 14/24] selftests/x86: Add a selftest for SGX Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 15/24] x86/sgx: Add provisioning Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 16/24] x86/sgx: Add a page reclaimer Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 17/24] x86/sgx: ptrace() support for the SGX driver Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 18/24] x86/vdso: Add support for exception fixup in vDSO functions Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 19/24] x86/fault: Add helper function to sanitize error code Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 20/24] x86/traps: Attempt to fixup exceptions in vDSO before signaling Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 21/24] x86/vdso: Add __vdso_sgx_enter_enclave() to wrap SGX enclave transitions Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 22/24] selftests/x86: Add vDSO selftest for SGX Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 23/24] docs: x86/sgx: Document microarchitecture Jarkko Sakkinen
2019-10-28 21:03 ` [PATCH v23 24/24] docs: x86/sgx: Document kernel internals Jarkko Sakkinen
2019-11-21 15:08 ` [PATCH v23 00/24] Intel SGX foundations Nathaniel McCallum
2019-11-27 21:01   ` Jarkko Sakkinen

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