From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17DDDCA9EC5 for ; Wed, 30 Oct 2019 15:55:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D95BA217F9 for ; Wed, 30 Oct 2019 15:55:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572450930; bh=ILInvjgqKHt6USRV+yI3xJFvX/OSj+lwjEbmcOh66G0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=DITOcf/uDgMIKoIj4ZA+42n5136OABXLRksQ6VB1yV9KuB6XmZ9Tv+FTZItyj/a7X MJzzZ+Ayny7OWlmqBZ4dAZ0av0GAEYh4UNhF0wY1R4qHbeyTQY/eiVDyR8Ty/4u1vT nToAIpagbLmSrsW6PhQ0j6JjA4IO82Kdxoqkufow= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728601AbfJ3Pz3 (ORCPT ); Wed, 30 Oct 2019 11:55:29 -0400 Received: from mail.kernel.org ([198.145.29.99]:57032 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728570AbfJ3Pz0 (ORCPT ); Wed, 30 Oct 2019 11:55:26 -0400 Received: from sasha-vm.mshome.net (100.50.158.77.rev.sfr.net [77.158.50.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C13FB21734; Wed, 30 Oct 2019 15:55:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572450926; bh=ILInvjgqKHt6USRV+yI3xJFvX/OSj+lwjEbmcOh66G0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QEMYzks5y5htzcbpcYrKSwg5kT/MajHOiR1ji7GiC/dNdspep6TvnYl7UBaB1szcQ mL13Lgmhlu5wFOcul5sFA5w7NQyhpsUMxmkl8n3oFbxiwncq3DwDPD8L9ihziI6ssL KkHqTmF0r00ewbnHpKJj/V804GnaEgpEfXBoA/dQ= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: afzal mohammed , Vladimir Murzin , Russell King , Sasha Levin Subject: [PATCH AUTOSEL 4.19 28/38] ARM: 8926/1: v7m: remove register save to stack before svc Date: Wed, 30 Oct 2019 11:53:56 -0400 Message-Id: <20191030155406.10109-28-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191030155406.10109-1-sashal@kernel.org> References: <20191030155406.10109-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: afzal mohammed [ Upstream commit 2ecb287998a47cc0a766f6071f63bc185f338540 ] r0-r3 & r12 registers are saved & restored, before & after svc respectively. Intention was to preserve those registers across thread to handler mode switch. On v7-M, hardware saves the register context upon exception in AAPCS complaint way. Restoring r0-r3 & r12 is done from stack location where hardware saves it, not from the location on stack where these registers were saved. To clarify, on stm32f429 discovery board: 1. before svc, sp - 0x90009ff8 2. r0-r3,r12 saved to 0x90009ff8 - 0x9000a00b 3. upon svc, h/w decrements sp by 32 & pushes registers onto stack 4. after svc, sp - 0x90009fd8 5. r0-r3,r12 restored from 0x90009fd8 - 0x90009feb Above means r0-r3,r12 is not restored from the location where they are saved, but since hardware pushes the registers onto stack, the registers are restored correctly. Note that during register saving to stack (step 2), it goes past 0x9000a000. And it seems, based on objdump, there are global symbols residing there, and it perhaps can cause issues on a non-XIP Kernel (on XIP, data section is setup later). Based on the analysis above, manually saving registers onto stack is at best no-op and at worst can cause data section corruption. Hence remove storing of registers onto stack before svc. Fixes: b70cd406d7fe ("ARM: 8671/1: V7M: Preserve registers across switch from Thread to Handler mode") Signed-off-by: afzal mohammed Acked-by: Vladimir Murzin Signed-off-by: Russell King Signed-off-by: Sasha Levin --- arch/arm/mm/proc-v7m.S | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S index 59d82864c134b..9c2978c128d97 100644 --- a/arch/arm/mm/proc-v7m.S +++ b/arch/arm/mm/proc-v7m.S @@ -135,7 +135,6 @@ __v7m_setup_cont: dsb mov r6, lr @ save LR ldr sp, =init_thread_union + THREAD_START_SP - stmia sp, {r0-r3, r12} cpsie i svc #0 1: cpsid i -- 2.20.1