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From: kan.liang@linux.intel.com
To: peterz@infradead.org, acme@kernel.org, mingo@kernel.org,
	linux-kernel@vger.kernel.org
Cc: tglx@linutronix.de, jolsa@kernel.org, eranian@google.com,
	alexander.shishkin@linux.intel.com, ak@linux.intel.com,
	Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH V5 01/14] perf/x86/intel: Introduce the fourth fixed counter
Date: Sun,  3 Nov 2019 15:29:07 -0800	[thread overview]
Message-ID: <20191103232920.20309-2-kan.liang@linux.intel.com> (raw)
In-Reply-To: <20191103232920.20309-1-kan.liang@linux.intel.com>

From: Kan Liang <kan.liang@linux.intel.com>

The fourth fixed counter, TOPDOWN.SLOTS, is introduced in Ice Lake.

Add MSR address and macros for the new fixed counter, which will be used
in the following patch.

Add comments to explain the event encoding rules for fixed counters.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---

Changes since V4:
- Add description regarding to event-code naming for fixed counters

 arch/x86/include/asm/perf_event.h | 21 ++++++++++++++++++---
 1 file changed, 18 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index ee26e9215f18..55a4d05ba6ec 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -146,12 +146,22 @@ struct x86_pmu_capability {
  */
 
 /*
- * All 3 fixed-mode PMCs are configured via this single MSR:
+ * All fixed-mode PMCs are configured via this single MSR:
  */
 #define MSR_ARCH_PERFMON_FIXED_CTR_CTRL	0x38d
 
 /*
- * The counts are available in three separate MSRs:
+ * There is no event-code assigned to fixed-mode PMCs.
+ * For the fixed-mode PMC which has an equivalent event on general-purpose PMCs,
+ * using the event-code of the equivalent event for the fixed-mode PMC.
+ * E.g. Instr_Retired.Any, CPU_CLK_Unhalted.Core
+ *
+ * For the fixed-mode PMCs which doesn't have an equivalent event,
+ * using pseudo-encoding, e.g. CPU_CLK_Unhalted.Ref, TOPDOWN.SLOTS.
+ * The event-code for fixed-mode PMCs must be 0x00.
+ * The umask-code is 0x0X. X indicates the index of the fixed counter.
+ *
+ * The counts are available in separate MSRs:
  */
 
 /* Instr_Retired.Any: */
@@ -162,11 +172,16 @@ struct x86_pmu_capability {
 #define MSR_ARCH_PERFMON_FIXED_CTR1	0x30a
 #define INTEL_PMC_IDX_FIXED_CPU_CYCLES	(INTEL_PMC_IDX_FIXED + 1)
 
-/* CPU_CLK_Unhalted.Ref: */
+/* CPU_CLK_Unhalted.Ref: event=0x00,umask=0x3 (pseudo-encoding) */
 #define MSR_ARCH_PERFMON_FIXED_CTR2	0x30b
 #define INTEL_PMC_IDX_FIXED_REF_CYCLES	(INTEL_PMC_IDX_FIXED + 2)
 #define INTEL_PMC_MSK_FIXED_REF_CYCLES	(1ULL << INTEL_PMC_IDX_FIXED_REF_CYCLES)
 
+/* TOPDOWN.SLOTS: event=0x00,umask=0x4 (pseudo-encoding) */
+#define MSR_ARCH_PERFMON_FIXED_CTR3	0x30c
+#define INTEL_PMC_IDX_FIXED_SLOTS	(INTEL_PMC_IDX_FIXED + 3)
+#define INTEL_PMC_MSK_FIXED_SLOTS	(1ULL << INTEL_PMC_IDX_FIXED_SLOTS)
+
 /*
  * We model BTS tracing as another fixed-mode PMC.
  *
-- 
2.17.1


  reply	other threads:[~2019-11-03 23:30 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-03 23:29 [PATCH V5 00/14] TopDown metrics support for Icelake kan.liang
2019-11-03 23:29 ` kan.liang [this message]
2019-11-03 23:29 ` [PATCH V5 02/14] perf/x86/intel: Set correct mask for TOPDOWN.SLOTS kan.liang
2019-11-03 23:29 ` [PATCH V5 03/14] perf/x86/intel: Move BTS index to 47 kan.liang
2019-11-03 23:29 ` [PATCH V5 04/14] perf/x86/intel: Basic support for metrics counters kan.liang
2019-11-03 23:29 ` [PATCH V5 05/14] perf/x86/intel: Fix the name of perf capabilities for perf METRICS kan.liang
2019-11-03 23:29 ` [PATCH V5 06/14] perf/x86/intel: Support hardware TopDown metrics kan.liang
2019-11-03 23:29 ` [PATCH V5 07/14] perf/x86/intel: Support per thread RDPMC " kan.liang
2019-11-03 23:29 ` [PATCH V5 08/14] perf/x86/intel: Export TopDown events for Icelake kan.liang
2019-11-03 23:29 ` [PATCH V5 09/14] perf/x86/intel: Disable sampling read slots and topdown kan.liang
2019-11-03 23:29 ` [PATCH V5 10/14] perf/x86/intel: Name global status bit in NMI handler kan.liang
2019-11-03 23:29 ` [PATCH V5 11/14] perf/x86: Use event_base_rdpmc for RDPMC userspace support kan.liang
2019-11-03 23:29 ` [PATCH V5 12/14] perf, tools, stat: Support new per thread TopDown metrics kan.liang
2019-11-03 23:29 ` [PATCH V5 13/14] perf, tools, stat: Check Topdown Metric group kan.liang
2019-11-03 23:29 ` [PATCH V5 14/14] perf, tools: Add documentation for topdown metrics kan.liang
2019-11-11 12:23 ` [PATCH V5 00/14] TopDown metrics support for Icelake Liang, Kan

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