From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: stable@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [stable 4.19+][PATCH 03/20] mailbox: stm32_ipcc: add spinlock to fix channels concurrent access
Date: Fri, 15 Nov 2019 15:33:39 -0700 [thread overview]
Message-ID: <20191115223356.27675-3-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <20191115223356.27675-1-mathieu.poirier@linaro.org>
From: Arnaud Pouliquen <arnaud.pouliquen@st.com>
commit dba9a3dfe912dc47c9dbc9ba1f5f65adbf9aea0f upstream
Add spinlock protection on IPCC register update to avoid race condition.
Without this fix, stm32_ipcc_set_bits and stm32_ipcc_clr_bits can be
called in parallel for different channels. This results in register
corruptions.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Cc: stable <stable@vger.kernel.org> # 4.19+
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
drivers/mailbox/stm32-ipcc.c | 37 ++++++++++++++++++++++++++----------
1 file changed, 27 insertions(+), 10 deletions(-)
diff --git a/drivers/mailbox/stm32-ipcc.c b/drivers/mailbox/stm32-ipcc.c
index ca1f993c0de3..e31322225e93 100644
--- a/drivers/mailbox/stm32-ipcc.c
+++ b/drivers/mailbox/stm32-ipcc.c
@@ -50,6 +50,7 @@ struct stm32_ipcc {
void __iomem *reg_base;
void __iomem *reg_proc;
struct clk *clk;
+ spinlock_t lock; /* protect access to IPCC registers */
int irqs[IPCC_IRQ_NUM];
int wkp;
u32 proc_id;
@@ -58,14 +59,24 @@ struct stm32_ipcc {
u32 xmr;
};
-static inline void stm32_ipcc_set_bits(void __iomem *reg, u32 mask)
+static inline void stm32_ipcc_set_bits(spinlock_t *lock, void __iomem *reg,
+ u32 mask)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(lock, flags);
writel_relaxed(readl_relaxed(reg) | mask, reg);
+ spin_unlock_irqrestore(lock, flags);
}
-static inline void stm32_ipcc_clr_bits(void __iomem *reg, u32 mask)
+static inline void stm32_ipcc_clr_bits(spinlock_t *lock, void __iomem *reg,
+ u32 mask)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(lock, flags);
writel_relaxed(readl_relaxed(reg) & ~mask, reg);
+ spin_unlock_irqrestore(lock, flags);
}
static irqreturn_t stm32_ipcc_rx_irq(int irq, void *data)
@@ -92,7 +103,7 @@ static irqreturn_t stm32_ipcc_rx_irq(int irq, void *data)
mbox_chan_received_data(&ipcc->controller.chans[chan], NULL);
- stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XSCR,
+ stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XSCR,
RX_BIT_CHAN(chan));
ret = IRQ_HANDLED;
@@ -121,7 +132,7 @@ static irqreturn_t stm32_ipcc_tx_irq(int irq, void *data)
dev_dbg(dev, "%s: chan:%d tx\n", __func__, chan);
/* mask 'tx channel free' interrupt */
- stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XMR,
+ stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR,
TX_BIT_CHAN(chan));
mbox_chan_txdone(&ipcc->controller.chans[chan], 0);
@@ -141,10 +152,12 @@ static int stm32_ipcc_send_data(struct mbox_chan *link, void *data)
dev_dbg(ipcc->controller.dev, "%s: chan:%d\n", __func__, chan);
/* set channel n occupied */
- stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XSCR, TX_BIT_CHAN(chan));
+ stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XSCR,
+ TX_BIT_CHAN(chan));
/* unmask 'tx channel free' interrupt */
- stm32_ipcc_clr_bits(ipcc->reg_proc + IPCC_XMR, TX_BIT_CHAN(chan));
+ stm32_ipcc_clr_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR,
+ TX_BIT_CHAN(chan));
return 0;
}
@@ -163,7 +176,8 @@ static int stm32_ipcc_startup(struct mbox_chan *link)
}
/* unmask 'rx channel occupied' interrupt */
- stm32_ipcc_clr_bits(ipcc->reg_proc + IPCC_XMR, RX_BIT_CHAN(chan));
+ stm32_ipcc_clr_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR,
+ RX_BIT_CHAN(chan));
return 0;
}
@@ -175,7 +189,7 @@ static void stm32_ipcc_shutdown(struct mbox_chan *link)
controller);
/* mask rx/tx interrupt */
- stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XMR,
+ stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR,
RX_BIT_CHAN(chan) | TX_BIT_CHAN(chan));
clk_disable_unprepare(ipcc->clk);
@@ -208,6 +222,8 @@ static int stm32_ipcc_probe(struct platform_device *pdev)
if (!ipcc)
return -ENOMEM;
+ spin_lock_init(&ipcc->lock);
+
/* proc_id */
if (of_property_read_u32(np, "st,proc-id", &ipcc->proc_id)) {
dev_err(dev, "Missing st,proc-id\n");
@@ -259,9 +275,10 @@ static int stm32_ipcc_probe(struct platform_device *pdev)
}
/* mask and enable rx/tx irq */
- stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XMR,
+ stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR,
RX_BIT_MASK | TX_BIT_MASK);
- stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XCR, XCR_RXOIE | XCR_TXOIE);
+ stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XCR,
+ XCR_RXOIE | XCR_TXOIE);
/* wakeup */
if (of_property_read_bool(np, "wakeup-source")) {
--
2.17.1
next prev parent reply other threads:[~2019-11-15 22:35 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-15 22:33 [stable 4.19+][PATCH 01/20] i2c: stm32f7: fix first byte to send in slave mode Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 02/20] ARM: dts: stm32: relax qspi pins slew-rate for stm32mp157 Mathieu Poirier
2019-11-15 22:33 ` Mathieu Poirier [this message]
2019-11-15 22:33 ` [stable 4.19+][PATCH 04/20] crypto: stm31/hash - Fix hmac issue more than 256 bytes Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 05/20] media: stm32-dcmi: fix DMA corruption when stopping streaming Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 06/20] media: stm32-dcmi: fix check of pm_runtime_get_sync return value Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 07/20] hwrng: stm32 - fix unbalanced pm_runtime_enable Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 08/20] remoteproc: fix rproc_da_to_va in case of unallocated carveout Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 09/20] clk: stm32mp1: fix HSI divider flag Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 10/20] clk: stm32mp1: fix mcu divider table Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 11/20] clk: stm32mp1: add CLK_SET_RATE_NO_REPARENT to Kernel clocks Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 12/20] clk: stm32mp1: parent clocks update Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 13/20] mailbox: mailbox-test: fix null pointer if no mmio Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 14/20] pinctrl: stm32: fix memory leak issue Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 15/20] ASoC: stm32: i2s: fix dma configuration Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 16/20] ASoC: stm32: i2s: fix 16 bit format support Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 17/20] ASoC: stm32: i2s: fix IRQ clearing Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 18/20] ASoC: stm32: sai: add missing put_device() Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 19/20] media: ov5640: fix framerate update Mathieu Poirier
2019-11-15 22:33 ` [stable 4.19+][PATCH 20/20] dmaengine: stm32-dma: check whether length is aligned on FIFO threshold Mathieu Poirier
2019-11-21 20:35 ` [stable 4.19+][PATCH 01/20] i2c: stm32f7: fix first byte to send in slave mode Greg KH
2019-11-22 16:27 ` Mathieu Poirier
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