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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id o18sm6447650otj.38.2019.11.18.08.53.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Nov 2019 08:53:45 -0800 (PST) Date: Mon, 18 Nov 2019 10:53:45 -0600 From: Rob Herring To: Yash Shah Cc: "linus.walleij@linaro.org" , "bgolaszewski@baylibre.com" , "mark.rutland@arm.com" , "palmer@dabbelt.com" , "Paul Walmsley ( Sifive)" , "aou@eecs.berkeley.edu" , "tglx@linutronix.de" , "jason@lakedaemon.net" , "maz@kernel.org" , "bmeng.cn@gmail.com" , "atish.patra@wdc.com" , Sagar Kadam , "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-riscv@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Sachin Ghadi Subject: Re: [PATCH 2/4] gpio: sifive: Add DT documentation for SiFive GPIO Message-ID: <20191118165345.GA3935@bogus> References: <1573560684-48104-1-git-send-email-yash.shah@sifive.com> <1573560684-48104-3-git-send-email-yash.shah@sifive.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1573560684-48104-3-git-send-email-yash.shah@sifive.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Nov 12, 2019 at 12:12:06PM +0000, Yash Shah wrote: > DT documentation for GPIO controller added. > > Signed-off-by: Wesley W. Terpstra > [Atish: Compatible string update] > Signed-off-by: Atish Patra > Signed-off-by: Yash Shah > --- > .../devicetree/bindings/gpio/gpio-sifive.txt | 33 ++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > create mode 100644 Documentation/devicetree/bindings/gpio/gpio-sifive.txt Please make this a schema. See Documentation/devicetree/writing-schema.rst. > > diff --git a/Documentation/devicetree/bindings/gpio/gpio-sifive.txt b/Documentation/devicetree/bindings/gpio/gpio-sifive.txt > new file mode 100644 > index 0000000..d3416d5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpio/gpio-sifive.txt > @@ -0,0 +1,33 @@ > +SiFive GPIO controller bindings > + > +Required properties: > +- compatible: Should be "sifive,-gpio" and "sifive,gpio". > + Supported compatible strings are: "sifive,fu540-c000-gpio" for the SiFive > + GPIO v0 as integrated onto the SiFive FU540 chip, and "sifive,gpio0" for the > + SiFive GPIO v0 IP block with no chip integration tweaks. > + Please refer to sifive-blocks-ip-versioning.txt for details. > +- reg: Physical base address and length of the controller's registers. > +- clocks: Should contain a clock identifier for the GPIO's parent clock. > +- #gpio-cells : Should be 2 > + - The first cell is the GPIO offset number. > + - The second cell indicates the polarity of the GPIO > +- gpio-controller : Marks the device node as a GPIO controller. > +- interrupt-controller: Marks the device node as an interrupt controller. > +- #interrupt-cells : Should be 2. > + - The first cell is the GPIO offset number within the GPIO controller. > + - The second cell is the edge/level to use for interrupt generation. > +- interrupts: Specify the interrupts, one per GPIO How many GPIOs? > + > +Example: > + > +gpio: gpio@10060000 { > + compatible = "sifive,fu540-c000-gpio","sifive,gpio0"; space ^ > + interrupt-parent = <&plic>; > + interrupts = <7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22>; > + reg = <0x0 0x10060000 0x0 0x1000>; > + clocks = <&tlclk>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-controller; > + #interrupt-cells = <2>; > +}; > -- > 2.7.4 >