From: Mika Westerberg <mika.westerberg@intel.com>
To: Karol Herbst <kherbst@redhat.com>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>,
Bjorn Helgaas <helgaas@kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
Lyude Paul <lyude@redhat.com>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
Linux PCI <linux-pci@vger.kernel.org>,
Linux PM <linux-pm@vger.kernel.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
nouveau <nouveau@lists.freedesktop.org>,
Dave Airlie <airlied@gmail.com>,
Mario Limonciello <Mario.Limonciello@dell.com>
Subject: Re: [PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
Date: Wed, 20 Nov 2019 18:23:06 +0200 [thread overview]
Message-ID: <20191120162306.GM11621@lahna.fi.intel.com> (raw)
In-Reply-To: <20191120155301.GL11621@lahna.fi.intel.com>
On Wed, Nov 20, 2019 at 05:53:07PM +0200, Mika Westerberg wrote:
> On Wed, Nov 20, 2019 at 04:37:14PM +0100, Karol Herbst wrote:
> > On Wed, Nov 20, 2019 at 4:15 PM Mika Westerberg
> > <mika.westerberg@intel.com> wrote:
> > >
> > > On Wed, Nov 20, 2019 at 01:11:52PM +0100, Karol Herbst wrote:
> > > > On Wed, Nov 20, 2019 at 1:09 PM Mika Westerberg
> > > > <mika.westerberg@intel.com> wrote:
> > > > >
> > > > > On Wed, Nov 20, 2019 at 12:58:00PM +0100, Karol Herbst wrote:
> > > > > > overall, what I really want to know is, _why_ does it work on windows?
> > > > >
> > > > > So do I ;-)
> > > > >
> > > > > > Or what are we doing differently on Linux so that it doesn't work? If
> > > > > > anybody has any idea on how we could dig into this and figure it out
> > > > > > on this level, this would probably allow us to get closer to the root
> > > > > > cause? no?
> > > > >
> > > > > Have you tried to use the acpi_rev_override parameter in your system and
> > > > > does it have any effect?
> > > > >
> > > > > Also did you try to trace the ACPI _ON/_OFF() methods? I think that
> > > > > should hopefully reveal something.
> > > > >
> > > >
> > > > I think I did in the past and it seemed to have worked, there is just
> > > > one big issue with this: it's a Dell specific workaround afaik, and
> > > > this issue plagues not just Dell, but we've seen it on HP and Lenovo
> > > > laptops as well, and I've heard about users having the same issues on
> > > > Asus and MSI laptops as well.
> > >
> > > Maybe it is not a workaround at all but instead it simply determines
> > > whether the system supports RTD3 or something like that (IIRC Windows 8
> > > started supporting it). Maybe Dell added check for Linux because at that
> > > time Linux did not support it.
> > >
> >
> > the point is, it's not checking it by default, so by default you still
> > run into the windows 8 codepath.
>
> Well you can add the quirk to acpi_rev_dmi_table[] so it goes to that
> path by default. There are a bunch of similar entries for Dell machines.
>
> Of course this does not help the non-Dell users so we would still need
> to figure out the root cause.
I think I asked you to test the PCIe delay patch and it did not help but
I wonder if it helps if we increase the delay. As an experiment could
you try Bjorn's pci/pm branch. The last two commits are for the delay.
If you could pull that branch and apply the following patch on top and
give it a try? Then post the dmesg somewhere so we can see whether it
did the delay at all.
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 1f319b1175da..1ad6f1372ed5 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4697,12 +4697,7 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)
return;
}
- /* Take d3cold_delay requirements into account */
- delay = pci_bus_max_d3cold_delay(dev->subordinate);
- if (!delay) {
- up_read(&pci_bus_sem);
- return;
- }
+ delay = 500;
child = list_first_entry(&dev->subordinate->devices, struct pci_dev,
bus_list);
@@ -4715,7 +4710,7 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)
* management for them (see pci_bridge_d3_possible()).
*/
if (!pci_is_pcie(dev)) {
- pci_dbg(dev, "waiting %d ms for secondary bus\n", 1000 + delay);
+ pci_info(dev, "waiting %d ms for secondary bus\n", 1000 + delay);
msleep(1000 + delay);
return;
}
@@ -4741,10 +4736,10 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)
return;
if (pcie_get_speed_cap(dev) <= PCIE_SPEED_5_0GT) {
- pci_dbg(dev, "waiting %d ms for downstream link\n", delay);
+ pci_info(dev, "waiting %d ms for downstream link\n", delay);
msleep(delay);
} else {
- pci_dbg(dev, "waiting %d ms for downstream link, after activation\n",
+ pci_info(dev, "waiting %d ms for downstream link, after activation\n",
delay);
if (!pcie_wait_for_link_delay(dev, true, delay)) {
/* Did not train, no need to wait any further */
@@ -4753,7 +4748,7 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)
}
if (!pci_device_is_present(child)) {
- pci_dbg(child, "waiting additional %d ms to become accessible\n", delay);
+ pci_info(child, "waiting additional %d ms to become accessible\n", delay);
msleep(delay);
}
}
next prev parent reply other threads:[~2019-11-20 16:23 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-17 12:19 [PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges Karol Herbst
2019-11-14 19:17 ` Karol Herbst
2019-11-19 20:06 ` Dave Airlie
2019-11-19 21:49 ` Bjorn Helgaas
2019-11-19 22:26 ` Karol Herbst
2019-11-19 22:57 ` Bjorn Helgaas
2019-11-20 10:18 ` Mika Westerberg
2019-11-20 10:52 ` Rafael J. Wysocki
2019-11-20 11:22 ` Mika Westerberg
2019-11-20 11:48 ` Rafael J. Wysocki
2019-11-20 11:51 ` Karol Herbst
2019-11-20 12:06 ` Rafael J. Wysocki
2019-11-20 12:09 ` Karol Herbst
2019-11-20 12:14 ` Rafael J. Wysocki
2019-11-20 12:19 ` Karol Herbst
2019-11-20 12:11 ` Rafael J. Wysocki
2019-11-20 11:51 ` Mika Westerberg
2019-11-20 11:54 ` Karol Herbst
2019-11-20 11:58 ` Karol Herbst
2019-11-20 12:09 ` Mika Westerberg
2019-11-20 12:11 ` Karol Herbst
2019-11-20 15:15 ` Mika Westerberg
2019-11-20 15:37 ` Karol Herbst
2019-11-20 15:53 ` Mika Westerberg
2019-11-20 16:23 ` Mika Westerberg [this message]
2019-11-20 21:36 ` Karol Herbst
2019-11-21 10:14 ` Mika Westerberg
2019-11-21 11:03 ` Rafael J. Wysocki
2019-11-21 11:08 ` Rafael J. Wysocki
2019-11-21 11:15 ` Rafael J. Wysocki
2019-11-21 11:17 ` Mika Westerberg
2019-11-21 11:31 ` Rafael J. Wysocki
2019-11-20 21:37 ` Rafael J. Wysocki
2019-11-20 21:40 ` Karol Herbst
2019-11-20 22:29 ` Rafael J. Wysocki
2019-11-21 11:28 ` Mika Westerberg
2019-11-21 11:34 ` Rafael J. Wysocki
2019-11-21 11:46 ` Mika Westerberg
2019-11-21 12:52 ` Mika Westerberg
2019-11-21 12:56 ` Karol Herbst
2019-11-21 15:43 ` Rafael J. Wysocki
2019-11-21 19:49 ` Mika Westerberg
2019-11-21 22:39 ` Rafael J. Wysocki
2019-11-21 22:50 ` Karol Herbst
2019-11-22 0:13 ` Karol Herbst
2019-11-22 9:07 ` Rafael J. Wysocki
2019-11-22 11:30 ` Karol Herbst
2019-11-22 10:36 ` Mika Westerberg
2019-11-22 11:30 ` Rafael J. Wysocki
2019-11-22 11:34 ` Karol Herbst
2019-11-22 11:54 ` Rafael J. Wysocki
2019-11-22 11:52 ` Mika Westerberg
2019-11-22 12:15 ` Rafael J. Wysocki
2019-11-21 12:52 ` Karol Herbst
2019-11-21 15:47 ` Rafael J. Wysocki
2019-11-21 16:06 ` Karol Herbst
2019-11-21 16:39 ` Rafael J. Wysocki
2019-11-26 23:10 ` Lyude Paul
2019-11-27 11:48 ` Mika Westerberg
2019-11-27 11:51 ` Karol Herbst
2019-11-27 19:51 ` Lyude Paul
2019-12-09 11:17 ` Karol Herbst
2019-12-09 11:38 ` Rafael J. Wysocki
2019-12-09 12:24 ` Karol Herbst
2019-12-10 19:58 ` Dave Airlie
2019-12-10 20:49 ` Karol Herbst
2020-01-13 15:31 ` Karol Herbst
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