From: Borislav Petkov <bp@alien8.de> To: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Barret Rhoden <brho@google.com>, Josh Bleecher Snyder <josharian@gmail.com>, "Rik van Riel\"" <riel@surriel.com>, x86@kernel.org, linux-kernel@vger.kernel.org, Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>, ian@airs.com Subject: Re: [PATCH] x86/fpu: Don't cache access to fpu_fpregs_owner_ctx Date: Wed, 27 Nov 2019 15:07:54 +0100 Message-ID: <20191127140754.GB3812@zn.tnic> (raw) In-Reply-To: <20191127124243.u74osvlkhcmsskng@linutronix.de> On Wed, Nov 27, 2019 at 01:42:43PM +0100, Sebastian Andrzej Siewior wrote: > The state/owner of FPU is saved fpu_fpregs_owner_ctx by pointing to the ^ to > context that is currently loaded. It never changed during the life time > of a task and remained stable/constant. > > Since we deferred loading the FPU registers on return to userland, the Drop those "we"s :) > content of fpu_fpregs_owner_ctx may change during preemption and must > not be cached. > This went unnoticed for some time and was now noticed, in particular > gcc-9 is able to cache that load in copy_fpstate_to_sigframe() and reuse > it in the retry loop: > > copy_fpstate_to_sigframe() > load fpu_fpregs_owner_ctx and save on stack > fpregs_lock() > copy_fpregs_to_sigframe() /* failed */ > fpregs_unlock() > *** PREEMPTION, another uses FPU, changes fpu_fpregs_owner_ctx *** > > fault_in_pages_writeable() /* succeed, retry */ > > fpregs_lock() > __fpregs_load_activate() > fpregs_state_valid() /* uses fpu_fpregs_owner_ctx from stack */ > copy_fpregs_to_sigframe() /* succeeds, random FPU content */ > > This is a comparison of the assembly of gcc-9, without vs with this > patch: > > | # arch/x86/kernel/fpu/signal.c:173: if (!access_ok(buf, size)) > | cmpq %rdx, %rax # tmp183, _4 > | jb .L190 #, > |-# arch/x86/include/asm/fpu/internal.h:512: return fpu == this_cpu_read_stable(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu; > |-#APP > |-# 512 "arch/x86/include/asm/fpu/internal.h" 1 > |- movq %gs:fpu_fpregs_owner_ctx,%rax #, pfo_ret__ > |-# 0 "" 2 > |-#NO_APP > |- movq %rax, -88(%rbp) # pfo_ret__, %sfp > … > |-# arch/x86/include/asm/fpu/internal.h:512: return fpu == this_cpu_read_stable(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu; > |- movq -88(%rbp), %rcx # %sfp, pfo_ret__ > |- cmpq %rcx, -64(%rbp) # pfo_ret__, %sfp > |+# arch/x86/include/asm/fpu/internal.h:512: return fpu == this_cpu_read(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu; > |+#APP > |+# 512 "arch/x86/include/asm/fpu/internal.h" 1 > |+ movq %gs:fpu_fpregs_owner_ctx(%rip),%rax # fpu_fpregs_owner_ctx, pfo_ret__ > |+# 0 "" 2 > |+# arch/x86/include/asm/fpu/internal.h:512: return fpu == this_cpu_read(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu; > |+#NO_APP > |+ cmpq %rax, -64(%rbp) # pfo_ret__, %sfp > > Use this_cpu_read() instead this_cpu_read_stable() to avoid caching of > fpu_fpregs_owner_ctx during preemption points. > > Fixes: 5f409e20b7945 ("x86/fpu: Defer FPU state load until return to userspace") Or a352a3b7b792 ("x86/fpu: Prepare copy_fpstate_to_sigframe() for TIF_NEED_FPU_LOAD") maybe, which adds the fpregs_unlock() ? > --- > > There is no Sign-off by here. Could this please be verified by the > reporter? Not the reporter, but I just tested it successfully too: Tested-by: Borislav Petkov <bp@suse.de> > Also I would like to add > Debugged-by: Ian Lance Taylor Yes, pls. CCed. > > but I lack the complete address also I'm not sure if he wants to. > Also please send a Reported-by line since I'm not sure who started this. > > arch/x86/include/asm/fpu/internal.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h > index 4c95c365058aa..44c48e34d7994 100644 > --- a/arch/x86/include/asm/fpu/internal.h > +++ b/arch/x86/include/asm/fpu/internal.h > @@ -509,7 +509,7 @@ static inline void __fpu_invalidate_fpregs_state(struct fpu *fpu) > > static inline int fpregs_state_valid(struct fpu *fpu, unsigned int cpu) > { > - return fpu == this_cpu_read_stable(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu; > + return fpu == this_cpu_read(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu; > } And to add one more data point from IRC: this is also documented: /* * this_cpu_read() makes gcc load the percpu variable every time it is * accessed while this_cpu_read_stable() allows the value to be cached. ^^^^^^^^^^^^^^^ * this_cpu_read_stable() is more efficient and can be used if its value * is guaranteed to be valid across cpus. The current users include * get_current() and get_thread_info() both of which are actually * per-thread variables implemented as per-cpu variables and thus * stable for the duration of the respective task. */ #define this_cpu_read_stable(var) percpu_stable_op("mov", var) -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply index Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-26 19:49 AVX register corruption from signal delivery Barret Rhoden 2019-11-26 20:20 ` Sebastian Andrzej Siewior 2019-11-26 21:23 ` Barret Rhoden 2019-11-26 22:13 ` Borislav Petkov 2019-11-26 22:30 ` Andy Lutomirski 2019-11-26 23:00 ` Borislav Petkov 2019-11-27 12:42 ` [PATCH] x86/fpu: Don't cache access to fpu_fpregs_owner_ctx Sebastian Andrzej Siewior 2019-11-27 14:07 ` Borislav Petkov [this message] 2019-11-27 18:42 ` Barret Rhoden 2019-11-28 8:53 ` [PATCH v2] " Sebastian Andrzej Siewior 2019-11-28 9:22 ` [tip: x86/urgent] " tip-bot2 for Sebastian Andrzej Siewior 2019-11-29 16:57 ` [PATCH v2] " David Laight 2019-11-29 17:08 ` 'Sebastian Andrzej Siewior' 2019-11-27 15:46 ` [PATCH] " Rik van Riel
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