From: 'Sebastian Andrzej Siewior' <bigeasy@linutronix.de>
To: David Laight <David.Laight@ACULAB.COM>
Cc: Barret Rhoden <brho@google.com>, Borislav Petkov <bp@alien8.de>,
Josh Bleecher Snyder <josharian@gmail.com>,
Rik van Riel <riel@surriel.com>,
"x86@kernel.org" <x86@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "ian@airs.com" <ian@airs.com>,
Austin Clements <austin@google.com>,
David Chase <drchase@golang.org>
Subject: Re: [PATCH v2] x86/fpu: Don't cache access to fpu_fpregs_owner_ctx
Date: Fri, 29 Nov 2019 18:08:06 +0100
Message-ID: <20191129170806.f6gvbpsom74njxpb@linutronix.de> (raw)
In-Reply-To: <d99a4a85441d48b1b34a7fb648d12379@AcuMS.aculab.com>
On 2019-11-29 16:57:42 [+0000], David Laight wrote:
> Should both fpregs_lock() and fpregs_unlock() contain a barrier() (or "memory" clobber)
> do stop the compiler moving anything across them?
They already do.
> David
Sebastian
next prev parent reply index
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-26 19:49 AVX register corruption from signal delivery Barret Rhoden
2019-11-26 20:20 ` Sebastian Andrzej Siewior
2019-11-26 21:23 ` Barret Rhoden
2019-11-26 22:13 ` Borislav Petkov
2019-11-26 22:30 ` Andy Lutomirski
2019-11-26 23:00 ` Borislav Petkov
2019-11-27 12:42 ` [PATCH] x86/fpu: Don't cache access to fpu_fpregs_owner_ctx Sebastian Andrzej Siewior
2019-11-27 14:07 ` Borislav Petkov
2019-11-27 18:42 ` Barret Rhoden
2019-11-28 8:53 ` [PATCH v2] " Sebastian Andrzej Siewior
2019-11-28 9:22 ` [tip: x86/urgent] " tip-bot2 for Sebastian Andrzej Siewior
2019-11-29 16:57 ` [PATCH v2] " David Laight
2019-11-29 17:08 ` 'Sebastian Andrzej Siewior' [this message]
2019-11-27 15:46 ` [PATCH] " Rik van Riel
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