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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <0b634341-ea2b-e9cd-4986-dc9a01c839bb@gmail.com> User-Agent: NeoMutt/20180716-391-311a52 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04-12-19, 16:57, Dmitry Osipenko wrote: > 04.12.2019 14:27, Viresh Kumar пишет: > > On 04-12-19, 16:25, sumitg wrote: > >> In T194, CCPLEX doesn't have access to set clocks and the > >> > >> clk_{get|set}_rate() functions set clocks by hook to BPMP R5. > >> > >> CPU freq can be directly set by CCPLEX using MSR(NVFREQ_REQ_EL1). > >> > >> As DVFS run's on BPMP, another MSR (NVFREQ_FEEDBACK_EL1) is > >> > >> used to read the counters and calculate "actual" cpu freq at CCPLEX. > >> > >> So, "cpuinfo_cur_freq" node gives the actual cpu frequency and not > >> > >> given by node "scaling_cur_freq". > > > > Right, but why can't this be hidden in the CPU's clk driver instead, > > so cpufreq driver can just do clk_get_rate() and clk_set_rate() ? > > What about to make use of dev_pm_opp_register_set_opp_helper()? It has a different purpose where we have to play with different regulators. And that won't help with clk_get_rate() anyway. -- viresh