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Date:   Tue, 17 Dec 2019 10:34:27 +0100
From:   Joerg Roedel <joro@8bytes.org>
To:     Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc:     linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org
Subject: Re: [PATCH 0/2] iommu/amd: Fixes for x2APIC support
Message-ID: <20191217093427.GD8689@8bytes.org>
References: <1574258149-15602-1-git-send-email-suravee.suthikulpanit@amd.com>
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On Wed, Nov 20, 2019 at 07:55:47AM -0600, Suravee Suthikulpanit wrote:
> Adding feature support check for MMIO access to MSI capability
> block registers when enabling x2APIC (XT) mode. Also fix up logic
> for checking XT feature support for IVHD type 10h.
> 
> Suravee Suthikulpanit (2):
>   iommu/amd: Check feature support bit before accessing MSI capability
>     registers
>   iommu/amd: Only support x2APIC with IVHD type 11h/40h

Applied both, thanks Suravee.