From: Marc Zyngier <maz@kernel.org>
To: Andrew Murray <andrew.murray@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Sudeep Holla <sudeep.holla@arm.com>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 08/18] arm64: KVM: add support to save/restore SPE profiling buffer controls
Date: Sat, 21 Dec 2019 13:57:55 +0000 [thread overview]
Message-ID: <20191221135755.70a6e8df@why> (raw)
In-Reply-To: <20191220143025.33853-9-andrew.murray@arm.com>
On Fri, 20 Dec 2019 14:30:15 +0000
Andrew Murray <andrew.murray@arm.com> wrote:
> From: Sudeep Holla <sudeep.holla@arm.com>
>
> Currently since we don't support profiling using SPE in the guests,
> we just save the PMSCR_EL1, flush the profiling buffers and disable
> sampling. However in order to support simultaneous sampling both in
Is the sampling actually simultaneous? I don't believe so (the whole
series would be much simpler if it was).
> the host and guests, we need to save and reatore the complete SPE
s/reatore/restore/
> profiling buffer controls' context.
>
> Let's add the support for the same and keep it disabled for now.
> We can enable it conditionally only if guests are allowed to use
> SPE.
>
> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
> [ Clear PMBSR bit when saving state to prevent spurious interrupts ]
> Signed-off-by: Andrew Murray <andrew.murray@arm.com>
> ---
> arch/arm64/kvm/hyp/debug-sr.c | 51 +++++++++++++++++++++++++++++------
> 1 file changed, 43 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/kvm/hyp/debug-sr.c b/arch/arm64/kvm/hyp/debug-sr.c
> index 8a70a493345e..12429b212a3a 100644
> --- a/arch/arm64/kvm/hyp/debug-sr.c
> +++ b/arch/arm64/kvm/hyp/debug-sr.c
> @@ -85,7 +85,8 @@
> default: write_debug(ptr[0], reg, 0); \
> }
>
> -static void __hyp_text __debug_save_spe_nvhe(struct kvm_cpu_context *ctxt)
> +static void __hyp_text
> +__debug_save_spe_nvhe(struct kvm_cpu_context *ctxt, bool full_ctxt)
nit: don't split lines like this if you can avoid it. You can put the
full_ctxt parameter on a separate line instead.
> {
> u64 reg;
>
> @@ -102,22 +103,46 @@ static void __hyp_text __debug_save_spe_nvhe(struct kvm_cpu_context *ctxt)
> if (reg & BIT(SYS_PMBIDR_EL1_P_SHIFT))
> return;
>
> - /* No; is the host actually using the thing? */
> - reg = read_sysreg_s(SYS_PMBLIMITR_EL1);
> - if (!(reg & BIT(SYS_PMBLIMITR_EL1_E_SHIFT)))
> + /* Save the control register and disable data generation */
> + ctxt->sys_regs[PMSCR_EL1] = read_sysreg_el1(SYS_PMSCR);
> +
> + if (!ctxt->sys_regs[PMSCR_EL1])
Shouldn't you check the enable bits instead of relying on the whole
thing being zero?
> return;
>
> /* Yes; save the control register and disable data generation */
> - ctxt->sys_regs[PMSCR_EL1] = read_sysreg_el1(SYS_PMSCR);
You've already saved the control register...
> write_sysreg_el1(0, SYS_PMSCR);
> isb();
>
> /* Now drain all buffered data to memory */
> psb_csync();
> dsb(nsh);
> +
> + if (!full_ctxt)
> + return;
> +
> + ctxt->sys_regs[PMBLIMITR_EL1] = read_sysreg_s(SYS_PMBLIMITR_EL1);
> + write_sysreg_s(0, SYS_PMBLIMITR_EL1);
> +
> + /*
> + * As PMBSR is conditionally restored when returning to the host we
> + * must ensure the service bit is unset here to prevent a spurious
> + * host SPE interrupt from being raised.
> + */
> + ctxt->sys_regs[PMBSR_EL1] = read_sysreg_s(SYS_PMBSR_EL1);
> + write_sysreg_s(0, SYS_PMBSR_EL1);
> +
> + isb();
> +
> + ctxt->sys_regs[PMSICR_EL1] = read_sysreg_s(SYS_PMSICR_EL1);
> + ctxt->sys_regs[PMSIRR_EL1] = read_sysreg_s(SYS_PMSIRR_EL1);
> + ctxt->sys_regs[PMSFCR_EL1] = read_sysreg_s(SYS_PMSFCR_EL1);
> + ctxt->sys_regs[PMSEVFR_EL1] = read_sysreg_s(SYS_PMSEVFR_EL1);
> + ctxt->sys_regs[PMSLATFR_EL1] = read_sysreg_s(SYS_PMSLATFR_EL1);
> + ctxt->sys_regs[PMBPTR_EL1] = read_sysreg_s(SYS_PMBPTR_EL1);
> }
>
> -static void __hyp_text __debug_restore_spe_nvhe(struct kvm_cpu_context *ctxt)
> +static void __hyp_text
> +__debug_restore_spe_nvhe(struct kvm_cpu_context *ctxt, bool full_ctxt)
> {
> if (!ctxt->sys_regs[PMSCR_EL1])
> return;
> @@ -126,6 +151,16 @@ static void __hyp_text __debug_restore_spe_nvhe(struct kvm_cpu_context *ctxt)
> isb();
>
> /* Re-enable data generation */
> + if (full_ctxt) {
> + write_sysreg_s(ctxt->sys_regs[PMBPTR_EL1], SYS_PMBPTR_EL1);
> + write_sysreg_s(ctxt->sys_regs[PMBLIMITR_EL1], SYS_PMBLIMITR_EL1);
> + write_sysreg_s(ctxt->sys_regs[PMSFCR_EL1], SYS_PMSFCR_EL1);
> + write_sysreg_s(ctxt->sys_regs[PMSEVFR_EL1], SYS_PMSEVFR_EL1);
> + write_sysreg_s(ctxt->sys_regs[PMSLATFR_EL1], SYS_PMSLATFR_EL1);
> + write_sysreg_s(ctxt->sys_regs[PMSIRR_EL1], SYS_PMSIRR_EL1);
> + write_sysreg_s(ctxt->sys_regs[PMSICR_EL1], SYS_PMSICR_EL1);
> + write_sysreg_s(ctxt->sys_regs[PMBSR_EL1], SYS_PMBSR_EL1);
> + }
> write_sysreg_el1(ctxt->sys_regs[PMSCR_EL1], SYS_PMSCR);
> }
>
> @@ -198,7 +233,7 @@ void __hyp_text __debug_restore_host_context(struct kvm_vcpu *vcpu)
> guest_ctxt = &vcpu->arch.ctxt;
>
> if (!has_vhe())
> - __debug_restore_spe_nvhe(host_ctxt);
> + __debug_restore_spe_nvhe(host_ctxt, false);
>
> if (!(vcpu->arch.flags & KVM_ARM64_DEBUG_DIRTY))
> return;
> @@ -222,7 +257,7 @@ void __hyp_text __debug_save_host_context(struct kvm_vcpu *vcpu)
>
> host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context);
> if (!has_vhe())
> - __debug_save_spe_nvhe(host_ctxt);
> + __debug_save_spe_nvhe(host_ctxt, false);
> }
>
> void __hyp_text __debug_save_guest_context(struct kvm_vcpu *vcpu)
So all of this is for non-VHE. What happens in the VHE case?
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2019-12-21 13:58 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-20 14:30 [PATCH v2 00/18] arm64: KVM: add SPE profiling support Andrew Murray
2019-12-20 14:30 ` [PATCH v2 01/18] dt-bindings: ARM SPE: highlight the need for PPI partitions on heterogeneous systems Andrew Murray
2019-12-20 14:30 ` [PATCH v2 02/18] arm64: KVM: reset E2PB correctly in MDCR_EL2 when exiting the guest(VHE) Andrew Murray
2019-12-21 13:12 ` Marc Zyngier
2019-12-24 10:29 ` Andrew Murray
2020-01-02 16:21 ` Andrew Murray
2019-12-20 14:30 ` [PATCH v2 03/18] arm64: KVM: define SPE data structure for each vcpu Andrew Murray
2019-12-21 13:19 ` Marc Zyngier
2019-12-24 12:01 ` Andrew Murray
2019-12-20 14:30 ` [PATCH v2 04/18] arm64: KVM: add SPE system registers to sys_reg_descs Andrew Murray
2019-12-20 14:30 ` [PATCH v2 05/18] arm64: KVM/VHE: enable the use PMSCR_EL12 on VHE systems Andrew Murray
2019-12-20 14:30 ` [PATCH v2 06/18] arm64: KVM: split debug save restore across vm/traps activation Andrew Murray
2019-12-20 14:30 ` [PATCH v2 07/18] arm64: KVM/debug: drop pmscr_el1 and use sys_regs[PMSCR_EL1] in kvm_cpu_context Andrew Murray
2019-12-20 14:30 ` [PATCH v2 08/18] arm64: KVM: add support to save/restore SPE profiling buffer controls Andrew Murray
2019-12-21 13:57 ` Marc Zyngier [this message]
2019-12-24 10:49 ` Andrew Murray
2019-12-24 15:17 ` Andrew Murray
2019-12-24 15:48 ` Marc Zyngier
2019-12-20 14:30 ` [PATCH v2 09/18] arm64: KVM: enable conditional save/restore full " Andrew Murray
2019-12-20 18:06 ` Mark Rutland
2019-12-24 12:15 ` Andrew Murray
2019-12-21 14:13 ` Marc Zyngier
2020-01-07 15:13 ` Andrew Murray
2020-01-08 11:17 ` Marc Zyngier
2020-01-08 11:58 ` Will Deacon
2020-01-08 12:36 ` Marc Zyngier
2020-01-08 13:10 ` Will Deacon
2020-01-09 11:23 ` Andrew Murray
2020-01-09 11:25 ` Andrew Murray
2020-01-09 12:01 ` Will Deacon
2020-01-10 10:54 ` Andrew Murray
2020-01-10 11:04 ` Andrew Murray
2020-01-10 11:51 ` Marc Zyngier
2020-01-10 12:12 ` Andrew Murray
2020-01-10 11:18 ` Marc Zyngier
2020-01-10 12:12 ` Andrew Murray
2020-01-10 13:34 ` Marc Zyngier
2019-12-20 14:30 ` [PATCH v2 10/18] arm64: KVM/debug: use EL1&0 stage 1 translation regime Andrew Murray
2019-12-22 10:34 ` Marc Zyngier
2019-12-24 11:11 ` Andrew Murray
2020-01-13 16:31 ` Andrew Murray
2020-01-15 14:03 ` Marc Zyngier
2019-12-20 14:30 ` [PATCH v2 11/18] KVM: arm64: don't trap Statistical Profiling controls to EL2 Andrew Murray
2019-12-20 18:08 ` Mark Rutland
2019-12-22 10:42 ` Marc Zyngier
2019-12-23 11:56 ` Andrew Murray
2019-12-23 12:05 ` Marc Zyngier
2019-12-23 12:10 ` Andrew Murray
2020-01-09 17:25 ` Andrew Murray
2020-01-09 17:42 ` Mark Rutland
2020-01-09 17:46 ` Andrew Murray
2019-12-20 14:30 ` [PATCH v2 12/18] KVM: arm64: add a new vcpu device control group for SPEv1 Andrew Murray
2019-12-22 11:03 ` Marc Zyngier
2019-12-24 12:30 ` Andrew Murray
2019-12-20 14:30 ` [PATCH v2 13/18] perf: arm_spe: Add KVM structure for obtaining IRQ info Andrew Murray
2019-12-22 11:24 ` Marc Zyngier
2019-12-24 12:35 ` Andrew Murray
2019-12-20 14:30 ` [PATCH v2 14/18] KVM: arm64: spe: Provide guest virtual interrupts for SPE Andrew Murray
2019-12-22 12:07 ` Marc Zyngier
2019-12-24 11:50 ` Andrew Murray
2019-12-24 12:42 ` Marc Zyngier
2019-12-24 13:08 ` Andrew Murray
2019-12-24 13:22 ` Marc Zyngier
2019-12-24 13:36 ` Andrew Murray
2019-12-24 13:46 ` Marc Zyngier
2019-12-20 14:30 ` [PATCH v2 15/18] perf: arm_spe: Handle guest/host exclusion flags Andrew Murray
2019-12-20 18:10 ` Mark Rutland
2019-12-22 12:10 ` Marc Zyngier
2019-12-23 12:10 ` Andrew Murray
2019-12-23 12:18 ` Marc Zyngier
2019-12-20 14:30 ` [PATCH v2 16/18] KVM: arm64: enable SPE support Andrew Murray
2019-12-20 14:30 ` [PATCH v2 17/18, KVMTOOL] update_headers: Sync kvm UAPI headers with linux v5.5-rc2 Andrew Murray
2019-12-20 14:30 ` [PATCH v2 18/18, KVMTOOL] kvm: add a vcpu feature for SPEv1 support Andrew Murray
2019-12-20 17:55 ` [PATCH v2 00/18] arm64: KVM: add SPE profiling support Mark Rutland
2019-12-24 12:54 ` Andrew Murray
2019-12-21 10:48 ` Marc Zyngier
2019-12-22 12:22 ` Marc Zyngier
2019-12-24 12:56 ` Andrew Murray
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