On Mon, Dec 09, 2019 at 10:20:02AM +0000, Eugen.Hristev@microchip.com wrote: > From: Eugen Hristev > > In SAM9X60 datasheet, FLEX_TWI_CWGR register description mentions clock > offset of 3 cycles (compared to 4 in eg. SAMA5D3). > This is the same offset as in SAMA5D2. > > Fixes: b00277923743 ("i2c: at91: add new platform support for sam9x60") > Suggested-by: Codrin Ciubotariu > Signed-off-by: Eugen Hristev > Acked-by: Ludovic Desroches > Reviewed-by: Codrin Ciubotariu Applied to for-current, thanks!