Hi Jagan,

On Mon, Dec 30, 2019 at 05:30:19PM +0530, Jagan Teki wrote:
> The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on
> the 1.5 version of the i.Core MX6 cpu module. The 1.5 version
> differs from the original one for a few details, including the
> ethernet PHY interface clock provider.
>
> With this commit, the ethernet interface works properly:
> SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver
>
> While before using the 1.5 version, ethernet failed to startup
> do to un-clocked PHY interface:
> fec 2188000.ethernet eth0: could not attach to PHY
>
> Similar fix has merged for i.Core MX6Q but missed to update for DL.
>
> Fixes: a8039f2dd089 ("ARM: dts: imx6dl: Add Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit support")
> Cc: Jacopo Mondi <jacopo@jmondi.org>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
> Changes for v2:
> - Add Michael s-o-b
>
>  arch/arm/boot/dts/imx6dl-icore-mipi.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx6dl-icore-mipi.dts b/arch/arm/boot/dts/imx6dl-icore-mipi.dts
> index e43bccb78ab2..d8f3821a0ffd 100644
> --- a/arch/arm/boot/dts/imx6dl-icore-mipi.dts
> +++ b/arch/arm/boot/dts/imx6dl-icore-mipi.dts
> @@ -8,7 +8,7 @@
>  /dts-v1/;
>
>  #include "imx6dl.dtsi"
> -#include "imx6qdl-icore.dtsi"
> +#include "imx6qdl-icore-1.5.dtsi"
>
>  / {
>  	model = "Engicam i.CoreM6 DualLite/Solo MIPI Starter Kit";

In
09ad741b7ece ("ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6")>

I also changed this line to
-       model = "Engicam i.CoreM6 Quad/Dual MIPI Starter Kit";
+       model = "Engicam i.CoreM6 1.5 Quad/Dual MIPI Starter Kit";

Maybe you want the same here.

With or without this change:
Reviewed-by: Jacopo Mondi <jacopo@jmondi.org>

Thanks
   j

> --
> 2.18.0.321.gffc6fa0e3