From: Andrew Murray <andrew.murray@arm.com>
To: "Z.q. Hou" <zhiqiang.hou@nxp.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"arnd@arndb.de" <arnd@arndb.de>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
"m.karthikeyan@mobiveil.co.in" <m.karthikeyan@mobiveil.co.in>,
Leo Li <leoyang.li@nxp.com>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
"will.deacon@arm.com" <will.deacon@arm.com>,
Mingkai Hu <mingkai.hu@nxp.com>,
"M.h. Lian" <minghuan.lian@nxp.com>,
Xiaowei Bao <xiaowei.bao@nxp.com>
Subject: Re: [PATCHv9 07/12] PCI: mobiveil: Make mobiveil_host_init() can be used to re-init host
Date: Mon, 13 Jan 2020 11:26:57 +0000 [thread overview]
Message-ID: <20200113112655.GM42593@e119886-lin.cambridge.arm.com> (raw)
In-Reply-To: <20191120034451.30102-8-Zhiqiang.Hou@nxp.com>
On Wed, Nov 20, 2019 at 03:46:03AM +0000, Z.q. Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> Make the mobiveil_host_init() function can be used to re-init
Perhaps reword to "Allow the mobiveil_host_init() function to be
used to ...
> host controller's PAB and GPEX CSR register block, as NXP
> integrated Mobiveil IP has to reset and then re-init the PAB
> and GPEX CSR registers upon hot-reset.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
> ---
> V9:
> - No change
>
> .../controller/mobiveil/pcie-mobiveil-host.c | 19 ++++++++++++-------
> .../pci/controller/mobiveil/pcie-mobiveil.h | 1 +
> 2 files changed, 13 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
> index 3cd93df6fe6e..9bc3da036720 100644
> --- a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
> +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
> @@ -221,18 +221,23 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie)
> writel_relaxed(1, pcie->apb_csr_base + MSI_ENABLE_OFFSET);
> }
>
> -static int mobiveil_host_init(struct mobiveil_pcie *pcie)
> +int mobiveil_host_init(struct mobiveil_pcie *pcie, bool reinit)
> {
> struct root_port *rp = &pcie->rp;
> struct pci_host_bridge *bridge = rp->bridge;
> u32 value, pab_ctrl, type;
> struct resource_entry *win;
>
> - /* setup bus numbers */
> - value = mobiveil_csr_readl(pcie, PCI_PRIMARY_BUS);
> - value &= 0xff000000;
> - value |= 0x00ff0100;
> - mobiveil_csr_writel(pcie, value, PCI_PRIMARY_BUS);
> + pcie->ib_wins_configured = 0;
> + pcie->ob_wins_configured = 0;
This works so long as the number of bridge->windows never reduces. I
think this assumption holds true.
Thanks,
Andrew Murray
> +
> + if (!reinit) {
> + /* setup bus numbers */
> + value = mobiveil_csr_readl(pcie, PCI_PRIMARY_BUS);
> + value &= 0xff000000;
> + value |= 0x00ff0100;
> + mobiveil_csr_writel(pcie, value, PCI_PRIMARY_BUS);
> + }
>
> /*
> * program Bus Master Enable Bit in Command Register in PAB Config
> @@ -569,7 +574,7 @@ int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie)
> * configure all inbound and outbound windows and prepare the RC for
> * config access
> */
> - ret = mobiveil_host_init(pcie);
> + ret = mobiveil_host_init(pcie, false);
> if (ret) {
> dev_err(dev, "Failed to initialize host\n");
> return ret;
> diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> index 95d2e7c809b8..37116c2a19fe 100644
> --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> @@ -166,6 +166,7 @@ struct mobiveil_pcie {
> };
>
> int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie);
> +int mobiveil_host_init(struct mobiveil_pcie *pcie, bool reinit);
> bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie);
> int mobiveil_bringup_link(struct mobiveil_pcie *pcie);
> void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr,
> --
> 2.17.1
>
next prev parent reply other threads:[~2020-01-13 11:27 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-20 3:45 [PATCHv9 00/12] PCI: Recode Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Z.q. Hou
2019-11-20 3:45 ` [PATCHv9 01/12] PCI: mobiveil: Re-abstract the private structure Z.q. Hou
2020-01-13 10:09 ` Andrew Murray
2020-02-06 11:04 ` Z.q. Hou
2020-02-06 11:27 ` Andrew Murray
2019-11-20 3:45 ` [PATCHv9 02/12] PCI: mobiveil: Move the host initialization into a routine Z.q. Hou
2020-01-13 10:19 ` Andrew Murray
2020-02-06 11:14 ` Z.q. Hou
2019-11-20 3:45 ` [PATCHv9 03/12] PCI: mobiveil: Collect the interrupt related operations " Z.q. Hou
2020-01-13 10:34 ` Andrew Murray
2020-02-06 11:30 ` Z.q. Hou
2019-11-20 3:45 ` [PATCHv9 04/12] PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driver Z.q. Hou
2020-01-13 11:05 ` Andrew Murray
2020-02-06 12:25 ` Z.q. Hou
2019-11-20 3:45 ` [PATCHv9 05/12] PCI: mobiveil: Add callback function for interrupt initialization Z.q. Hou
2020-01-13 11:19 ` Andrew Murray
2020-02-06 13:25 ` Z.q. Hou
2019-11-20 3:45 ` [PATCHv9 06/12] PCI: mobiveil: Add callback function for link up check Z.q. Hou
2020-01-13 11:22 ` Andrew Murray
2020-02-06 13:25 ` Z.q. Hou
2019-11-20 3:46 ` [PATCHv9 07/12] PCI: mobiveil: Make mobiveil_host_init() can be used to re-init host Z.q. Hou
2020-01-13 11:26 ` Andrew Murray [this message]
2020-02-06 13:27 ` Z.q. Hou
2019-11-20 3:46 ` [PATCHv9 08/12] PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors Z.q. Hou
2020-01-13 11:31 ` Andrew Murray
2020-02-06 13:45 ` Z.q. Hou
2019-11-20 3:46 ` [PATCHv9 09/12] dt-bindings: PCI: Add NXP Layerscape SoCs PCIe Gen4 controller Z.q. Hou
2019-11-20 3:46 ` [PATCHv9 10/12] PCI: mobiveil: Add PCIe Gen4 RC driver for NXP Layerscape SoCs Z.q. Hou
2020-01-13 12:02 ` Andrew Murray
2020-02-06 13:45 ` Z.q. Hou
2020-02-06 14:29 ` Andrew Murray
2019-11-20 3:46 ` [PATCHv9 11/12] arm64: dts: lx2160a: Add PCIe controller DT nodes Z.q. Hou
2019-11-20 3:46 ` [PATCHv9 12/12] arm64: defconfig: Enable CONFIG_PCIE_LAYERSCAPE_GEN4 Z.q. Hou
2019-11-20 9:57 ` [PATCHv9 00/12] PCI: Recode Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Russell King - ARM Linux admin
2019-11-20 10:30 ` Z.q. Hou
2019-12-13 18:37 ` Olof Johansson
2019-12-17 2:50 ` Z.q. Hou
2020-01-10 15:33 ` Lorenzo Pieralisi
2020-01-10 17:05 ` Olof Johansson
2020-02-06 10:57 ` Z.q. Hou
2020-02-10 15:12 ` Olof Johansson
2020-02-10 15:22 ` Russell King - ARM Linux admin
2020-02-10 15:28 ` Olof Johansson
2020-02-10 16:15 ` Russell King - ARM Linux admin
2020-02-10 17:20 ` Russell King - ARM Linux admin
2020-02-10 18:33 ` Olof Johansson
2020-02-10 18:41 ` Li Yang
2020-02-10 19:48 ` Li Yang
2020-02-11 12:13 ` Laurentiu Tudor
2020-02-11 13:04 ` Robin Murphy
2020-02-11 13:55 ` Laurentiu Tudor
2020-02-11 14:51 ` Robin Murphy
2020-02-11 14:48 ` Olof Johansson
2020-02-11 15:14 ` Laurentiu Tudor
2020-02-29 9:55 ` Russell King - ARM Linux admin
2020-02-29 11:04 ` Russell King - ARM Linux admin
2020-02-29 12:08 ` Russell King - ARM Linux admin
2020-02-29 13:32 ` Russell King - ARM Linux admin
2020-02-29 15:19 ` Theodore Y. Ts'o
2020-02-29 17:03 ` Russell King - ARM Linux admin
2020-02-29 18:03 ` Theodore Y. Ts'o
2020-06-05 23:53 ` Russell King - ARM Linux admin
2020-06-06 10:19 ` Russell King - ARM Linux admin
2020-02-10 15:33 ` Lorenzo Pieralisi
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