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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id h7sm5895085otk.56.2020.01.14.16.11.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jan 2020 16:11:54 -0800 (PST) Received: from rob (uid 1000) (envelope-from rob@rob-hp-laptop) id 2209ae by rob-hp-laptop (DragonFly Mail Agent v0.11); Tue, 14 Jan 2020 18:11:52 -0600 Date: Tue, 14 Jan 2020 18:11:52 -0600 From: Rob Herring To: Anson Huang Cc: aisheng.dong@nxp.com, festevam@gmail.com, shawnguo@kernel.org, stefan@agner.ch, kernel@pengutronix.de, linus.walleij@linaro.org, mark.rutland@arm.com, s.hauer@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Linux-imx@nxp.com Subject: Re: [PATCH V2 2/3] dt-bindings: pinctrl: Convert i.MX8MM to json-schema Message-ID: <20200115001152.GA12156@bogus> References: <1578629120-25793-1-git-send-email-Anson.Huang@nxp.com> <1578629120-25793-2-git-send-email-Anson.Huang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1578629120-25793-2-git-send-email-Anson.Huang@nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jan 10, 2020 at 12:05:19PM +0800, Anson Huang wrote: > Convert the i.MX8MM pinctrl binding to DT schema format using json-schema > > Signed-off-by: Anson Huang > --- > Changes since V1: > - use "grp$" instead of "-grp$"; > - use space instead of tab for "ref$"; > - add missed "reg" property; > - remove the "maxItem" for "fsl,pins" to avoid build warning, as the item number is changable. > --- > .../bindings/pinctrl/fsl,imx8mm-pinctrl.txt | 36 ----------- > .../bindings/pinctrl/fsl,imx8mm-pinctrl.yaml | 69 ++++++++++++++++++++++ > 2 files changed, 69 insertions(+), 36 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt > create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml > > diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt > deleted file mode 100644 > index e4e01c0..0000000 > --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt > +++ /dev/null > @@ -1,36 +0,0 @@ > -* Freescale IMX8MM IOMUX Controller > - > -Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory > -for common binding part and usage. > - > -Required properties: > -- compatible: "fsl,imx8mm-iomuxc" > -- reg: should contain the base physical address and size of the iomuxc > - registers. > - > -Required properties in sub-nodes: > -- fsl,pins: each entry consists of 6 integers and represents the mux and config > - setting for one pin. The first 5 integers - input_val> are specified using a PIN_FUNC_ID macro, which can be found in > - . The last integer CONFIG is > - the pad setting value like pull-up on this pin. Please refer to i.MX8M Mini > - Reference Manual for detailed CONFIG settings. > - > -Examples: > - > -&uart1 { > - pinctrl-names = "default"; > - pinctrl-0 = <&pinctrl_uart1>; > -}; > - > -iomuxc: pinctrl@30330000 { > - compatible = "fsl,imx8mm-iomuxc"; > - reg = <0x0 0x30330000 0x0 0x10000>; > - > - pinctrl_uart1: uart1grp { > - fsl,pins = < > - MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 > - MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 > - >; > - }; > -}; > diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml > new file mode 100644 > index 0000000..a3c4275 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml > @@ -0,0 +1,69 @@ > +# SPDX-License-Identifier: GPL-2.0-or-later Sorry, one other thing. You're good with GPLv9? Plus this is a license change. Do you have rights to do so as some of this comes from the old binding doc? If you do, then make it: (GPL-2.0-only OR BSD-2-Clause) Rob