From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 844E1C2D0CE for ; Tue, 21 Jan 2020 16:01:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 65DF724125 for ; Tue, 21 Jan 2020 16:01:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729605AbgAUQBl (ORCPT ); Tue, 21 Jan 2020 11:01:41 -0500 Received: from mga06.intel.com ([134.134.136.31]:53140 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729345AbgAUQBb (ORCPT ); Tue, 21 Jan 2020 11:01:31 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Jan 2020 08:01:30 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,346,1574150400"; d="scan'208";a="425533376" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga005.fm.intel.com with ESMTP; 21 Jan 2020 08:01:26 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id DA818D09; Tue, 21 Jan 2020 18:01:15 +0200 (EET) From: Mika Westerberg To: Andy Shevchenko , Darren Hart , Lee Jones Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H . Peter Anvin" , x86@kernel.org, Zha Qipeng , "David E . Box" , Guenter Roeck , Heikki Krogerus , Greg Kroah-Hartman , Wim Van Sebroeck , Mark Brown , Mika Westerberg , platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 26/38] mfd: intel_soc_pmic: Add SCU IPC member to struct intel_soc_pmic Date: Tue, 21 Jan 2020 19:01:02 +0300 Message-Id: <20200121160114.60007-27-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200121160114.60007-1-mika.westerberg@linux.intel.com> References: <20200121160114.60007-1-mika.westerberg@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Both PMIC drivers (intel_soc_pmic_mrfld and intel_soc_pmic_bxtwc) will be using this field going forward to access the SCU IPC instance. While there add kernel-doc for the intel_soc_pmic structure. Signed-off-by: Mika Westerberg Reviewed-by: Andy Shevchenko --- include/linux/mfd/intel_soc_pmic.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/include/linux/mfd/intel_soc_pmic.h b/include/linux/mfd/intel_soc_pmic.h index bfecd6bd4990..1e462549f5f1 100644 --- a/include/linux/mfd/intel_soc_pmic.h +++ b/include/linux/mfd/intel_soc_pmic.h @@ -13,6 +13,20 @@ #include +/** + * struct intel_soc_pmic - Intel SoC PMIC data + * @irq: Master interrupt number of the parent PMIC device + * @regmap: Pointer to the parent PMIC device regmap structure + * @irq_chip_data: IRQ chip data for the PMIC itself + * @irq_chip_data_pwrbtn: Chained IRQ chip data for the power button + * @irq_chip_data_tmu: Chained IRQ chip data for the time management unit + * @irq_chip_data_bcu: Chained IRQ chip data for the burst control unit + * @irq_chip_data_adc: Chained IRQ chip data for the general purpose ADC + * @irq_chip_data_chgr: Chained IRQ chip data for the external charger + * @irq_chip_data_crit: Chained IRQ chip data for the critical event handler + * @dev: Pointer to the parent PMIC device + * @scu: Pointer to the SCU IPC device data structure + */ struct intel_soc_pmic { int irq; struct regmap *regmap; @@ -24,6 +38,7 @@ struct intel_soc_pmic { struct regmap_irq_chip_data *irq_chip_data_chgr; struct regmap_irq_chip_data *irq_chip_data_crit; struct device *dev; + struct intel_scu_ipc_dev *scu; }; int intel_soc_pmic_exec_mipi_pmic_seq_element(u16 i2c_address, u32 reg_address, -- 2.24.1