From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DCC07C2D0DB for ; Tue, 28 Jan 2020 14:08:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B31BD22522 for ; Tue, 28 Jan 2020 14:08:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580220483; bh=AL84hXQnvQ6S9Zt46n2nAflUzeffjOxJDWDAJW2DTHE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=jWGYVBSp6QcSBeE8XSXEzl0/TMJoC5JT0QZtSz7wuHJBiN5WeQJOYI4Qto/6VgXGo i/e6pXZl8USATXg2i2sZ4gFU2BZISv38Do7b5/NxeZNgLx3vWdXZ8Fa05aLg9UI/+U +Tpao+hxPinpJ2Xh4aIdw2iBo8QZPA1lYWsc2Zcc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728400AbgA1OID (ORCPT ); Tue, 28 Jan 2020 09:08:03 -0500 Received: from mail.kernel.org ([198.145.29.99]:55886 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728140AbgA1OIA (ORCPT ); Tue, 28 Jan 2020 09:08:00 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E47CD24685; Tue, 28 Jan 2020 14:07:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580220479; bh=AL84hXQnvQ6S9Zt46n2nAflUzeffjOxJDWDAJW2DTHE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WaYeuU1wcEpmhpGBawt09b57kVbJoTWtrY7zGap6nVbUr1RgTcq7AJjsSNjZl6ZSn hUpw47yi9CX+BL+PHLjOPaH5ekmCeBA2a5qYA5Unc1699EkMESU+dY9B7wKRTxVRmN QKiEBpk/1OUnd/iaevAlmzLe3Gvkxozij2mzBspY= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Yangtao Li , Stephen Boyd , Sasha Levin Subject: [PATCH 4.4 023/183] clk: socfpga: fix refcount leak Date: Tue, 28 Jan 2020 15:04:02 +0100 Message-Id: <20200128135832.294024888@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200128135829.486060649@linuxfoundation.org> References: <20200128135829.486060649@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Yangtao Li [ Upstream commit 7f9705beeb3759e69165e7aff588f6488ff6c1ac ] The of_find_compatible_node() returns a node pointer with refcount incremented, but there is the lack of use of the of_node_put() when done. Add the missing of_node_put() to release the refcount. Signed-off-by: Yangtao Li Fixes: 5343325ff3dd ("clk: socfpga: add a clock driver for the Arria 10 platform") Fixes: a30d27ed739b ("clk: socfpga: fix clock driver for 3.15") Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin --- drivers/clk/socfpga/clk-pll-a10.c | 1 + drivers/clk/socfpga/clk-pll.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/clk/socfpga/clk-pll-a10.c b/drivers/clk/socfpga/clk-pll-a10.c index 402d630bd531e..623d5b77fb432 100644 --- a/drivers/clk/socfpga/clk-pll-a10.c +++ b/drivers/clk/socfpga/clk-pll-a10.c @@ -95,6 +95,7 @@ static struct __init clk * __socfpga_pll_init(struct device_node *node, clkmgr_np = of_find_compatible_node(NULL, NULL, "altr,clk-mgr"); clk_mgr_a10_base_addr = of_iomap(clkmgr_np, 0); + of_node_put(clkmgr_np); BUG_ON(!clk_mgr_a10_base_addr); pll_clk->hw.reg = clk_mgr_a10_base_addr + reg; diff --git a/drivers/clk/socfpga/clk-pll.c b/drivers/clk/socfpga/clk-pll.c index c7f463172e4b9..b4b44e9b59011 100644 --- a/drivers/clk/socfpga/clk-pll.c +++ b/drivers/clk/socfpga/clk-pll.c @@ -100,6 +100,7 @@ static __init struct clk *__socfpga_pll_init(struct device_node *node, clkmgr_np = of_find_compatible_node(NULL, NULL, "altr,clk-mgr"); clk_mgr_base_addr = of_iomap(clkmgr_np, 0); + of_node_put(clkmgr_np); BUG_ON(!clk_mgr_base_addr); pll_clk->hw.reg = clk_mgr_base_addr + reg; -- 2.20.1