From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B30EC2D0DB for ; Tue, 28 Jan 2020 14:17:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5FF4324688 for ; Tue, 28 Jan 2020 14:17:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580221021; bh=VuMsKBRBxCYbvIrB00nURs8cZXEpVbI5i5U9GF4OQzM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=JZVMtReDJVr1F+G5+6XDwR75ORMjxpL2EDs/zXcaUF3Yl90jSqYd9F8OFhMp3CdR2 M5jf2Kpqe9wNB1J3b2op3IMyDBifFJKrteiSI2rYTjgDBWNkhS0cyeZ2NQGTu6HD3I +enyeLNvyectJLG9aux1YZFjHQ2H1TIITNNBrgd0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730200AbgA1OQ7 (ORCPT ); Tue, 28 Jan 2020 09:16:59 -0500 Received: from mail.kernel.org ([198.145.29.99]:40566 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730418AbgA1OQ5 (ORCPT ); Tue, 28 Jan 2020 09:16:57 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E7D9424688; Tue, 28 Jan 2020 14:16:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580221017; bh=VuMsKBRBxCYbvIrB00nURs8cZXEpVbI5i5U9GF4OQzM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cIKPFoClxYXJ7y5YEAhGBQY29ZcBP+YYBqMJSHY2t1twPxYCjaS29IK0pQauu6ufS rfFFJIdXRgTjczWygcwfwpwtE73TawirZfhDIZsYtqasKkOdCC9sRBCAP9tkt14qmx t29PT3B55iG4o81hFe3oJwRbVRFZ8ffaawGVBM58= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Vladimir Zapolskiy , Sasha Levin Subject: [PATCH 4.9 055/271] ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller clocks property Date: Tue, 28 Jan 2020 15:03:24 +0100 Message-Id: <20200128135856.739615942@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200128135852.449088278@linuxfoundation.org> References: <20200128135852.449088278@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Vladimir Zapolskiy [ Upstream commit 30fc01bae3cda747e7d9c352b1aa51ca113c8a9d ] The originally added ARM PrimeCell PL111 clocks property misses the required "clcdclk" clock, which is the same as a clock to enable the LCD controller on NXP LPC3230 and NXP LPC3250 SoCs. Fixes: 93898eb775e5 ("arm: dts: lpc32xx: add clock properties to device nodes") Signed-off-by: Vladimir Zapolskiy Signed-off-by: Sasha Levin --- arch/arm/boot/dts/lpc32xx.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi index 3adbbaff79715..2802c9565b6ca 100644 --- a/arch/arm/boot/dts/lpc32xx.dtsi +++ b/arch/arm/boot/dts/lpc32xx.dtsi @@ -142,8 +142,8 @@ compatible = "arm,pl111", "arm,primecell"; reg = <0x31040000 0x1000>; interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk LPC32XX_CLK_LCD>; - clock-names = "apb_pclk"; + clocks = <&clk LPC32XX_CLK_LCD>, <&clk LPC32XX_CLK_LCD>; + clock-names = "clcdclk", "apb_pclk"; status = "disabled"; }; -- 2.20.1