From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA167C35247 for ; Mon, 3 Feb 2020 10:09:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7FBEF2084E for ; Mon, 3 Feb 2020 10:09:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="pbA0KAqE" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727785AbgBCKJy (ORCPT ); Mon, 3 Feb 2020 05:09:54 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:46388 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727695AbgBCKJw (ORCPT ); Mon, 3 Feb 2020 05:09:52 -0500 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 0139vFa9024543; Mon, 3 Feb 2020 11:09:05 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=vji+KdcJdxDbdE9XaBnUG+ZVhDLiDwWdOQKGdLRS7W8=; b=pbA0KAqEXx/u34WlBAk/EVk9G8+wGhxa22CdviUcaWFBEritcAD23pBtOK8ZFxZ0tYil HkOnUMgQD/0wtVp/GRj45eeyfw3NzOYMEPHRli0p5yhgurIbDpV6BHMhVK0iHV1Kxwz2 MZoswBPy2equsQ7oy5wfzI+Mpx4Vmyn4Zs18dFhkzCmexX1vaIF454IgAOo2NUQlH7kS WFTCDrfcPhtFSNm944ntUzPlSeaquZpferhCUGncrkg4blBjGXjEKgpOgV1bHwCgXyA4 SLlx6Y4ipgosQbZXSjrOrJBHuRbGPCYkcSg7PhgVegaagcR4WNcvItV0kOW0zIfbU6I5 8g== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2xw13ngdpn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 03 Feb 2020 11:09:05 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1F278100038; Mon, 3 Feb 2020 11:08:58 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag6node2.st.com [10.75.127.17]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 0E7262BE22D; Mon, 3 Feb 2020 11:08:58 +0100 (CET) Received: from localhost (10.75.127.45) by SFHDAG6NODE2.st.com (10.75.127.17) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 3 Feb 2020 11:08:57 +0100 From: Olivier Moysan To: , , , , , , , , , , CC: Etienne Carriere Subject: [PATCH 1/6] ASoC: stm32: sai: manage error when getting reset controller Date: Mon, 3 Feb 2020 11:08:09 +0100 Message-ID: <20200203100814.22944-2-olivier.moysan@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200203100814.22944-1-olivier.moysan@st.com> References: <20200203100814.22944-1-olivier.moysan@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG3NODE3.st.com (10.75.127.9) To SFHDAG6NODE2.st.com (10.75.127.17) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-03_02:2020-02-02,2020-02-03 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return an error when the SAI driver fails to get a reset controller. Also add an error trace, except on probe defer status. Signed-off-by: Etienne Carriere Signed-off-by: Olivier Moysan --- sound/soc/stm/stm32_sai.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/sound/soc/stm/stm32_sai.c b/sound/soc/stm/stm32_sai.c index e20267504b16..b824ba6cb028 100644 --- a/sound/soc/stm/stm32_sai.c +++ b/sound/soc/stm/stm32_sai.c @@ -197,12 +197,16 @@ static int stm32_sai_probe(struct platform_device *pdev) return sai->irq; /* reset */ - rst = devm_reset_control_get_exclusive(&pdev->dev, NULL); - if (!IS_ERR(rst)) { - reset_control_assert(rst); - udelay(2); - reset_control_deassert(rst); + rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); + if (IS_ERR(rst)) { + if (PTR_ERR(rst) != -EPROBE_DEFER) + dev_err(&pdev->dev, "Reset controller error %ld\n", + PTR_ERR(rst)); + return PTR_ERR(rst); } + reset_control_assert(rst); + udelay(2); + reset_control_deassert(rst); /* Enable peripheral clock to allow register access */ ret = clk_prepare_enable(sai->pclk); -- 2.17.1