* [PATCH] habanalabs: fix DDR bar address setting
@ 2020-02-06 11:16 Omer Shpigelman
2020-02-07 7:05 ` Oded Gabbay
0 siblings, 1 reply; 2+ messages in thread
From: Omer Shpigelman @ 2020-02-06 11:16 UTC (permalink / raw)
To: oded.gabbay; +Cc: linux-kernel
DRAM_PHYS_BASE is already taken into account in MMU_PAGE_TABLES_ADDR.
Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai>
---
drivers/misc/habanalabs/goya/goya.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/misc/habanalabs/goya/goya.c b/drivers/misc/habanalabs/goya/goya.c
index 74785ccd2cb1..f634e9c5cad9 100644
--- a/drivers/misc/habanalabs/goya/goya.c
+++ b/drivers/misc/habanalabs/goya/goya.c
@@ -2575,8 +2575,7 @@ static int goya_hw_init(struct hl_device *hdev)
* After CPU initialization is finished, change DDR bar mapping inside
* iATU to point to the start address of the MMU page tables
*/
- if (goya_set_ddr_bar_base(hdev, DRAM_PHYS_BASE +
- (MMU_PAGE_TABLES_ADDR &
+ if (goya_set_ddr_bar_base(hdev, (MMU_PAGE_TABLES_ADDR &
~(prop->dram_pci_bar_size - 0x1ull))) == U64_MAX) {
dev_err(hdev->dev,
"failed to map DDR bar to MMU page tables\n");
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] habanalabs: fix DDR bar address setting
2020-02-06 11:16 [PATCH] habanalabs: fix DDR bar address setting Omer Shpigelman
@ 2020-02-07 7:05 ` Oded Gabbay
0 siblings, 0 replies; 2+ messages in thread
From: Oded Gabbay @ 2020-02-07 7:05 UTC (permalink / raw)
To: Omer Shpigelman; +Cc: linux-kernel
On Thu, Feb 6, 2020 at 1:16 PM Omer Shpigelman <oshpigelman@habana.ai> wrote:
>
> DRAM_PHYS_BASE is already taken into account in MMU_PAGE_TABLES_ADDR.
>
> Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai>
> ---
> drivers/misc/habanalabs/goya/goya.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/misc/habanalabs/goya/goya.c b/drivers/misc/habanalabs/goya/goya.c
> index 74785ccd2cb1..f634e9c5cad9 100644
> --- a/drivers/misc/habanalabs/goya/goya.c
> +++ b/drivers/misc/habanalabs/goya/goya.c
> @@ -2575,8 +2575,7 @@ static int goya_hw_init(struct hl_device *hdev)
> * After CPU initialization is finished, change DDR bar mapping inside
> * iATU to point to the start address of the MMU page tables
> */
> - if (goya_set_ddr_bar_base(hdev, DRAM_PHYS_BASE +
> - (MMU_PAGE_TABLES_ADDR &
> + if (goya_set_ddr_bar_base(hdev, (MMU_PAGE_TABLES_ADDR &
> ~(prop->dram_pci_bar_size - 0x1ull))) == U64_MAX) {
> dev_err(hdev->dev,
> "failed to map DDR bar to MMU page tables\n");
> --
> 2.17.1
>
This patch is:
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2020-02-07 7:05 ` Oded Gabbay
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